JPS57109420A - Delay device - Google Patents
Delay deviceInfo
- Publication number
- JPS57109420A JPS57109420A JP18649780A JP18649780A JPS57109420A JP S57109420 A JPS57109420 A JP S57109420A JP 18649780 A JP18649780 A JP 18649780A JP 18649780 A JP18649780 A JP 18649780A JP S57109420 A JPS57109420 A JP S57109420A
- Authority
- JP
- Japan
- Prior art keywords
- supplied
- input signal
- components
- delay
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
- H03K5/082—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding with an adaptive threshold
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Manipulation Of Pulses (AREA)
Abstract
PURPOSE:To transmit accurately DC components also in a delay device using charge transfer elements. CONSTITUTION:The input signal applied to a terminal 101 is supplied to a delay circuit 102 consisting of charge transfer elements. The delay signal from the delay circuit 102 is supplied to a gain correcting circuit 104 through an adder 103, and the input signal has the gain corrected and input signal has the gain corrected and is obtained in an output terminal 105. This gain corrected signal and the input signal are supplied to a subtractor 106 to operate a difference between them. The differential output from the substractor 106 is supplied to a low pass filter 107, and low frequency components namely, DC components are taken out and are supplied to the adder 103 through an amplifier 108. That is, even if DC components are fluctuated in the delay circuit 102, they are so fed back that they have no difference between the input signal and the output signal. Consequently, a delay output where DC components are transmitted accurately is obtained in the output terminal 105.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18649780A JPS57109420A (en) | 1980-12-26 | 1980-12-26 | Delay device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18649780A JPS57109420A (en) | 1980-12-26 | 1980-12-26 | Delay device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57109420A true JPS57109420A (en) | 1982-07-07 |
Family
ID=16189517
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18649780A Pending JPS57109420A (en) | 1980-12-26 | 1980-12-26 | Delay device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57109420A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0320022A2 (en) * | 1987-12-11 | 1989-06-14 | Sanyo Electric Co., Ltd. | DC Restoration circuit for restoring and compensating for low frequency component lost in digital signal transmission system |
-
1980
- 1980-12-26 JP JP18649780A patent/JPS57109420A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0320022A2 (en) * | 1987-12-11 | 1989-06-14 | Sanyo Electric Co., Ltd. | DC Restoration circuit for restoring and compensating for low frequency component lost in digital signal transmission system |
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