JPS57103491A - Pulse signal processing system - Google Patents
Pulse signal processing systemInfo
- Publication number
- JPS57103491A JPS57103491A JP17900380A JP17900380A JPS57103491A JP S57103491 A JPS57103491 A JP S57103491A JP 17900380 A JP17900380 A JP 17900380A JP 17900380 A JP17900380 A JP 17900380A JP S57103491 A JPS57103491 A JP S57103491A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- information
- memory
- scn
- reads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Exchange Systems With Centralized Control (AREA)
Abstract
PURPOSE:To monitor the signal during the fault processing, by providing a signal discrimination memory whose contents are determined by detection information, a physical pulse width, and a signal receiving state logic of a pulse signal related to trunk lines of a stored program control exchange. CONSTITUTION:In a time division electronic exchange, scan information SCN obtained by multiplexers 4 and 6 of analogue lines and information SCN of a digital line 3 are sent to a signal processing device 26 through a time division switch 21. Information SCN is operated through a serial-parallel converting circuit 28 by a circuit 29 and is written in a receiving memory 30. Meanwhile, an accumulator 31 of a pulse signal processing device 27 takes in the output of the circuit 28 and measures the time elapse of signal change and reads contents of a trunk memory 32 where signal receiving state information STN is stored, and logic information LOG expressing a signal SCN is stored in a signal discrimination memory 33. A central control device 22 reads and scans the memory 33 at a constant period and reads information LOG for a trunk line, for which signal detection information is indicated, to perform the signal processing.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17900380A JPS57103491A (en) | 1980-12-19 | 1980-12-19 | Pulse signal processing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17900380A JPS57103491A (en) | 1980-12-19 | 1980-12-19 | Pulse signal processing system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57103491A true JPS57103491A (en) | 1982-06-28 |
JPS6254278B2 JPS6254278B2 (en) | 1987-11-13 |
Family
ID=16058410
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17900380A Granted JPS57103491A (en) | 1980-12-19 | 1980-12-19 | Pulse signal processing system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57103491A (en) |
-
1980
- 1980-12-19 JP JP17900380A patent/JPS57103491A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6254278B2 (en) | 1987-11-13 |
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