JPS5694509A - Compensator for signal missing for reproduced digital modulation wave - Google Patents

Compensator for signal missing for reproduced digital modulation wave

Info

Publication number
JPS5694509A
JPS5694509A JP17308179A JP17308179A JPS5694509A JP S5694509 A JPS5694509 A JP S5694509A JP 17308179 A JP17308179 A JP 17308179A JP 17308179 A JP17308179 A JP 17308179A JP S5694509 A JPS5694509 A JP S5694509A
Authority
JP
Japan
Prior art keywords
signal
missing
storage circuit
clock
input terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17308179A
Other languages
Japanese (ja)
Other versions
JPS6213748B2 (en
Inventor
Shigenori Iwakuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP17308179A priority Critical patent/JPS5694509A/en
Publication of JPS5694509A publication Critical patent/JPS5694509A/en
Publication of JPS6213748B2 publication Critical patent/JPS6213748B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Noise Elimination (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)

Abstract

PURPOSE: To obtain the reproducing analog signal with high quality and fidelity, by detecting the missing of signal when analog conversion signal level change is more than audible frequency and inputting the signal immediately before the signal missing.
CONSTITUTION: Write-in clocks (W clock) from an input terminal 4 and readout clocks (R clock) from an input terminal 5 are given to a main storage circuit 1 and to an auxiliary storage circuit 6 after sequential readout. When missing of signal is present, it is detected with a of detection circuit 2 signal missing operation, and a signal missing word address NX and words mx, ny are stored in a of storage circuit 3 signal storage missing address. The output of storage signal missing word address is fed to one input terminal of a NAND gate 7 to interrupt R clock. Thus, an auxiliary storage circuit 6 stops write-in and the word NX-1 output prior to the missing word number NX is succeedingly read out and it is fed to a main storage circuit 8.
COPYRIGHT: (C)1981,JPO&Japio
JP17308179A 1979-12-27 1979-12-27 Compensator for signal missing for reproduced digital modulation wave Granted JPS5694509A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17308179A JPS5694509A (en) 1979-12-27 1979-12-27 Compensator for signal missing for reproduced digital modulation wave

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17308179A JPS5694509A (en) 1979-12-27 1979-12-27 Compensator for signal missing for reproduced digital modulation wave

Publications (2)

Publication Number Publication Date
JPS5694509A true JPS5694509A (en) 1981-07-31
JPS6213748B2 JPS6213748B2 (en) 1987-03-28

Family

ID=15953847

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17308179A Granted JPS5694509A (en) 1979-12-27 1979-12-27 Compensator for signal missing for reproduced digital modulation wave

Country Status (1)

Country Link
JP (1) JPS5694509A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0357162U (en) * 1989-10-11 1991-05-31

Also Published As

Publication number Publication date
JPS6213748B2 (en) 1987-03-28

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