JPS5690317A - Central processor equipment having extension data channel device - Google Patents

Central processor equipment having extension data channel device

Info

Publication number
JPS5690317A
JPS5690317A JP16794679A JP16794679A JPS5690317A JP S5690317 A JPS5690317 A JP S5690317A JP 16794679 A JP16794679 A JP 16794679A JP 16794679 A JP16794679 A JP 16794679A JP S5690317 A JPS5690317 A JP S5690317A
Authority
JP
Japan
Prior art keywords
data channel
extension data
central processor
control circuit
processor equipment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16794679A
Other languages
Japanese (ja)
Inventor
Naotoshi Ukai
Katsunobu Miyake
Kazuo Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP16794679A priority Critical patent/JPS5690317A/en
Publication of JPS5690317A publication Critical patent/JPS5690317A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To increase the number of degrees of freedom of the array configuration of the extension data channel without executing the operation exceeding the upper limit of the memory access time, by easily dividing the extension data channel, and accomodating the side related to the memory operation in the original central processor equipment.
CONSTITUTION: The extension data channel is divided into the memory access control circuit 7-1 and the extension data channel device 7-2 except the memory access control circuit 7-1. This control circuit 7-1 is provided in the central processor equipment 1, and it is connected through the bus 2 to the memory 3 and other data channel devices 4-1, 4-2.... Also, the extension data channel device 7-2 is connected to the control circuit 7-1 by the interface 5 for extension. And, the number of degrees of freedom of the array configuration of the extension data channel is increased without executing the operation exceeding the upper limit of the memory access time.
COPYRIGHT: (C)1981,JPO&Japio
JP16794679A 1979-12-24 1979-12-24 Central processor equipment having extension data channel device Pending JPS5690317A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16794679A JPS5690317A (en) 1979-12-24 1979-12-24 Central processor equipment having extension data channel device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16794679A JPS5690317A (en) 1979-12-24 1979-12-24 Central processor equipment having extension data channel device

Publications (1)

Publication Number Publication Date
JPS5690317A true JPS5690317A (en) 1981-07-22

Family

ID=15858971

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16794679A Pending JPS5690317A (en) 1979-12-24 1979-12-24 Central processor equipment having extension data channel device

Country Status (1)

Country Link
JP (1) JPS5690317A (en)

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