JPS5687920A - Pulse output device - Google Patents

Pulse output device

Info

Publication number
JPS5687920A
JPS5687920A JP16414779A JP16414779A JPS5687920A JP S5687920 A JPS5687920 A JP S5687920A JP 16414779 A JP16414779 A JP 16414779A JP 16414779 A JP16414779 A JP 16414779A JP S5687920 A JPS5687920 A JP S5687920A
Authority
JP
Japan
Prior art keywords
counter
output
subtraction
pulse width
designation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16414779A
Other languages
Japanese (ja)
Inventor
Mamoru Araya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP16414779A priority Critical patent/JPS5687920A/en
Publication of JPS5687920A publication Critical patent/JPS5687920A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/78—Generating a single train of pulses having a predetermined pattern, e.g. a predetermined number

Landscapes

  • Feedback Control In General (AREA)

Abstract

PURPOSE:To remarkably reduce the overhead time by program processing and to enable the control efficiently and with less error, against the control variable requiring continuous change, by continuously changing the output pulse width for the output only with one program designation. CONSTITUTION:The designation of the number of times of output of pulses output from the 2nd counter 22 and the integration start instruction are given to the 1st counter 20. Further, the overflow signal of the 2nd counter 22 subtracts the subtraction counter 21 by one, and the content of the subtraction counter 21 is preset to the 2nd counter 22. Further, the 1st counter 20 is repetitively operated with a given time interval to convert it into the pulse width designated with the subtraction counter 21 through the set of the number of output pulses once. Moreover, the output of specified number of times stops the pulse output with the overflow signal of the 1st counter 20.
JP16414779A 1979-12-19 1979-12-19 Pulse output device Pending JPS5687920A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16414779A JPS5687920A (en) 1979-12-19 1979-12-19 Pulse output device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16414779A JPS5687920A (en) 1979-12-19 1979-12-19 Pulse output device

Publications (1)

Publication Number Publication Date
JPS5687920A true JPS5687920A (en) 1981-07-17

Family

ID=15787632

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16414779A Pending JPS5687920A (en) 1979-12-19 1979-12-19 Pulse output device

Country Status (1)

Country Link
JP (1) JPS5687920A (en)

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