JPS5687290A - Direct memory access system - Google Patents
Direct memory access systemInfo
- Publication number
- JPS5687290A JPS5687290A JP16285079A JP16285079A JPS5687290A JP S5687290 A JPS5687290 A JP S5687290A JP 16285079 A JP16285079 A JP 16285079A JP 16285079 A JP16285079 A JP 16285079A JP S5687290 A JPS5687290 A JP S5687290A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- dma
- processor
- execution
- refreshing action
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Bus Control (AREA)
Abstract
PURPOSE:To realize a refreshing action even under the DMA execution, by using a static memory and dynamic memory for execution of DMA and otherwise respectively and then separating the CPU from the static memory in the case of DMA. CONSTITUTION:A refreshing action is given to the dynamic memory 2 by the processor 1 even under execution of DMA and without using any special circuit performing the refreshing action other than the processor 1. In other words, the quantity of data transferred once by the DMA is comparatively small, and thus the static memory 3 is used for the memory area for execution of DMA. And the dynamic memory 2 is used for other memory areas. In the case of DMA, a separation is given between the processor 1 and the memory 3 with the gate circuit 7 turned off. Then the refreshing action is continued for the memory 2 by the processor 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54162850A JPS5948476B2 (en) | 1979-12-17 | 1979-12-17 | Direct memory access method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54162850A JPS5948476B2 (en) | 1979-12-17 | 1979-12-17 | Direct memory access method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5687290A true JPS5687290A (en) | 1981-07-15 |
JPS5948476B2 JPS5948476B2 (en) | 1984-11-27 |
Family
ID=15762421
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP54162850A Expired JPS5948476B2 (en) | 1979-12-17 | 1979-12-17 | Direct memory access method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5948476B2 (en) |
-
1979
- 1979-12-17 JP JP54162850A patent/JPS5948476B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5948476B2 (en) | 1984-11-27 |
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