JPS5680898A - Memory device - Google Patents

Memory device

Info

Publication number
JPS5680898A
JPS5680898A JP15766779A JP15766779A JPS5680898A JP S5680898 A JPS5680898 A JP S5680898A JP 15766779 A JP15766779 A JP 15766779A JP 15766779 A JP15766779 A JP 15766779A JP S5680898 A JPS5680898 A JP S5680898A
Authority
JP
Japan
Prior art keywords
signal
memory
returned
error
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15766779A
Other languages
Japanese (ja)
Inventor
Isao Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15766779A priority Critical patent/JPS5680898A/en
Publication of JPS5680898A publication Critical patent/JPS5680898A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To execute an analysis and diagnosis of the failure easily and enhance the examination function by storing an operating signal before detecting an error by providing memory status memory part.
CONSTITUTION: In an operating processing device 1, a fixed time monitoring is carried out and of a signal 64 as a response signal 64 is not returned in this time, it is refered to a time out error. Because of an intermittent failure, when the signal 73 as a signal ANS is not returned, a signal 74 as a reading data DO is not returned and device 1 detects the signal 75 as a time out error ERR. In this case, a read write indicating signal 49 specifies the writing, and in a memory status memory portion 24, a signal 61 as a memory request ERQ, a signal 62 as a request accept signal ACPT and signals 64 and 66 as signals ANS, ERR are stored as status. When a signal 49 commands to read and starts to read the content from the memory portion 24, a time chart can be recorded as it is and the signal analysis as for in what period the error is caused is easily done.
COPYRIGHT: (C)1981,JPO&Japio
JP15766779A 1979-12-05 1979-12-05 Memory device Pending JPS5680898A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15766779A JPS5680898A (en) 1979-12-05 1979-12-05 Memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15766779A JPS5680898A (en) 1979-12-05 1979-12-05 Memory device

Publications (1)

Publication Number Publication Date
JPS5680898A true JPS5680898A (en) 1981-07-02

Family

ID=15654741

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15766779A Pending JPS5680898A (en) 1979-12-05 1979-12-05 Memory device

Country Status (1)

Country Link
JP (1) JPS5680898A (en)

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