JPS5678199A - Method of laminating multilayer printed board - Google Patents

Method of laminating multilayer printed board

Info

Publication number
JPS5678199A
JPS5678199A JP15417879A JP15417879A JPS5678199A JP S5678199 A JPS5678199 A JP S5678199A JP 15417879 A JP15417879 A JP 15417879A JP 15417879 A JP15417879 A JP 15417879A JP S5678199 A JPS5678199 A JP S5678199A
Authority
JP
Japan
Prior art keywords
printed board
multilayer printed
laminating multilayer
laminating
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15417879A
Other languages
Japanese (ja)
Inventor
Shinji Umemoto
Michio Yokozawa
Toshirou Kodama
Kiyoshi Takagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15417879A priority Critical patent/JPS5678199A/en
Publication of JPS5678199A publication Critical patent/JPS5678199A/en
Pending legal-status Critical Current

Links

JP15417879A 1979-11-30 1979-11-30 Method of laminating multilayer printed board Pending JPS5678199A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15417879A JPS5678199A (en) 1979-11-30 1979-11-30 Method of laminating multilayer printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15417879A JPS5678199A (en) 1979-11-30 1979-11-30 Method of laminating multilayer printed board

Publications (1)

Publication Number Publication Date
JPS5678199A true JPS5678199A (en) 1981-06-26

Family

ID=15578529

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15417879A Pending JPS5678199A (en) 1979-11-30 1979-11-30 Method of laminating multilayer printed board

Country Status (1)

Country Link
JP (1) JPS5678199A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62252194A (en) * 1986-04-24 1987-11-02 イビデン株式会社 Manufacture of multilayer printed interconnection board
JPH02501871A (en) * 1986-11-13 1990-06-21 ジヨンストン，ジエイムズ・エイ Method and apparatus for manufacturing printed circuit boards
US5482586A (en) * 1989-02-23 1996-01-09 Fanuc Ltd. Method of manufacturing multilayer printed wiring board
JP2014192221A (en) * 2013-03-26 2014-10-06 Kyocera Corp Electronic component and manufacturing method of the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4980572A (en) * 1972-12-11 1974-08-03
JPS5454276A (en) * 1977-10-08 1979-04-28 Nippon Mining Co Method of manufacturing printed wiring board

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4980572A (en) * 1972-12-11 1974-08-03
JPS5454276A (en) * 1977-10-08 1979-04-28 Nippon Mining Co Method of manufacturing printed wiring board

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62252194A (en) * 1986-04-24 1987-11-02 イビデン株式会社 Manufacture of multilayer printed interconnection board
JPH0451080B2 (en) * 1986-04-24 1992-08-18 Ibiden Co Ltd
JPH02501871A (en) * 1986-11-13 1990-06-21 ジヨンストン，ジエイムズ・エイ Method and apparatus for manufacturing printed circuit boards
US5482586A (en) * 1989-02-23 1996-01-09 Fanuc Ltd. Method of manufacturing multilayer printed wiring board
JP2014192221A (en) * 2013-03-26 2014-10-06 Kyocera Corp Electronic component and manufacturing method of the same

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