JPS5674761A - Information processor - Google Patents
Information processorInfo
- Publication number
- JPS5674761A JPS5674761A JP15065779A JP15065779A JPS5674761A JP S5674761 A JPS5674761 A JP S5674761A JP 15065779 A JP15065779 A JP 15065779A JP 15065779 A JP15065779 A JP 15065779A JP S5674761 A JPS5674761 A JP S5674761A
- Authority
- JP
- Japan
- Prior art keywords
- timer
- information processing
- data area
- computer
- distinction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To use a data area for a computer and that for a timer in distinction from each other by generating part of the address signal of RAM by signals that correspond to two kinds of information processing mode.
CONSTITUTION: This processor performs information processing as a computer and that as a timer to set and reset latch circuit 7 according to information processing modes of the both. Therefore, the computer data area and timer data area of RAM8 can be used in distinction from each other by set-reset output Z of circuit 7 at the same address assigned by X address register 6.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15065779A JPS5674761A (en) | 1979-11-22 | 1979-11-22 | Information processor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15065779A JPS5674761A (en) | 1979-11-22 | 1979-11-22 | Information processor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5674761A true JPS5674761A (en) | 1981-06-20 |
Family
ID=15501633
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15065779A Pending JPS5674761A (en) | 1979-11-22 | 1979-11-22 | Information processor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5674761A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5843122U (en) * | 1981-09-17 | 1983-03-23 | 日立建機株式会社 | Work equipment control circuit |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49112548A (en) * | 1973-02-23 | 1974-10-26 | ||
JPS50155146A (en) * | 1974-06-03 | 1975-12-15 | ||
JPS513538A (en) * | 1974-06-27 | 1976-01-13 | Tokyo Shibaura Electric Co | |
JPS52146526A (en) * | 1976-05-31 | 1977-12-06 | Hitachi Ltd | Main internal memory expanding unit |
JPS53139936A (en) * | 1977-05-13 | 1978-12-06 | Nippon Telegr & Teleph Corp <Ntt> | Accesing system for memory unit |
JPS5424549A (en) * | 1977-07-26 | 1979-02-23 | Nec Corp | Memory address converter |
JPS5578363A (en) * | 1978-12-08 | 1980-06-12 | Casio Comput Co Ltd | Memory area set system |
-
1979
- 1979-11-22 JP JP15065779A patent/JPS5674761A/en active Pending
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49112548A (en) * | 1973-02-23 | 1974-10-26 | ||
JPS50155146A (en) * | 1974-06-03 | 1975-12-15 | ||
JPS513538A (en) * | 1974-06-27 | 1976-01-13 | Tokyo Shibaura Electric Co | |
JPS52146526A (en) * | 1976-05-31 | 1977-12-06 | Hitachi Ltd | Main internal memory expanding unit |
JPS53139936A (en) * | 1977-05-13 | 1978-12-06 | Nippon Telegr & Teleph Corp <Ntt> | Accesing system for memory unit |
JPS5424549A (en) * | 1977-07-26 | 1979-02-23 | Nec Corp | Memory address converter |
JPS5578363A (en) * | 1978-12-08 | 1980-06-12 | Casio Comput Co Ltd | Memory area set system |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5843122U (en) * | 1981-09-17 | 1983-03-23 | 日立建機株式会社 | Work equipment control circuit |
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