JPS5673972A - Rejection system of low density picture signal - Google Patents

Rejection system of low density picture signal

Info

Publication number
JPS5673972A
JPS5673972A JP14995879A JP14995879A JPS5673972A JP S5673972 A JPS5673972 A JP S5673972A JP 14995879 A JP14995879 A JP 14995879A JP 14995879 A JP14995879 A JP 14995879A JP S5673972 A JPS5673972 A JP S5673972A
Authority
JP
Japan
Prior art keywords
register
signal
parallel
low density
picture signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14995879A
Other languages
Japanese (ja)
Inventor
Moritomo Matsuyama
Isao Fukushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14995879A priority Critical patent/JPS5673972A/en
Publication of JPS5673972A publication Critical patent/JPS5673972A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/41—Bandwidth or redundancy reduction

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Facsimile Image Signal Circuits (AREA)

Abstract

PURPOSE:To make sharp the displayed picture, by removing and transmitting the digital video signal occupying a low rank digits in predetermined number from the least significant digit of the digital video signal. CONSTITUTION:A parallel digital density measuring signal A produced from a scanning measuring means 3 and converted into an A-D converter 4 is fed to a register 5. On the other hand, since the mask bit pattern signal B is fed to the bit location corresponding to the register 5 from the mask register 6 to the register 5 in parallel, parallel 8-bit signal C is stored in the register 5 and transferred.
JP14995879A 1979-11-21 1979-11-21 Rejection system of low density picture signal Pending JPS5673972A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14995879A JPS5673972A (en) 1979-11-21 1979-11-21 Rejection system of low density picture signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14995879A JPS5673972A (en) 1979-11-21 1979-11-21 Rejection system of low density picture signal

Publications (1)

Publication Number Publication Date
JPS5673972A true JPS5673972A (en) 1981-06-19

Family

ID=15486312

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14995879A Pending JPS5673972A (en) 1979-11-21 1979-11-21 Rejection system of low density picture signal

Country Status (1)

Country Link
JP (1) JPS5673972A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02305183A (en) * 1989-05-19 1990-12-18 Fujitsu General Ltd Picture processing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02305183A (en) * 1989-05-19 1990-12-18 Fujitsu General Ltd Picture processing method

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