JPS56501146A - - Google Patents

Info

Publication number
JPS56501146A
JPS56501146A JP50220980A JP50220980A JPS56501146A JP S56501146 A JPS56501146 A JP S56501146A JP 50220980 A JP50220980 A JP 50220980A JP 50220980 A JP50220980 A JP 50220980A JP S56501146 A JPS56501146 A JP S56501146A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50220980A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS56501146A publication Critical patent/JPS56501146A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66833Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a charge trapping gate insulator, e.g. MNOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/792Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
JP50220980A 1979-09-13 1980-09-11 Pending JPS56501146A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US7484079A 1979-09-13 1979-09-13

Publications (1)

Publication Number Publication Date
JPS56501146A true JPS56501146A (de) 1981-08-13

Family

ID=22121989

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50220980A Pending JPS56501146A (de) 1979-09-13 1980-09-11

Country Status (3)

Country Link
EP (1) EP0035558A1 (de)
JP (1) JPS56501146A (de)
WO (1) WO1981000790A1 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08306687A (ja) * 1995-05-10 1996-11-22 Nec Corp 半導体装置およびその製造方法

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58500683A (ja) * 1981-05-11 1983-04-28 エヌ・シ−・ア−ル・コ−ポレ−シヨン 閾値変更可能半導体メモリ−装置
US5168334A (en) * 1987-07-31 1992-12-01 Texas Instruments, Incorporated Non-volatile semiconductor memory
US4870470A (en) * 1987-10-16 1989-09-26 International Business Machines Corporation Non-volatile memory cell having Si rich silicon nitride charge trapping layer
US6297096B1 (en) * 1997-06-11 2001-10-02 Saifun Semiconductors Ltd. NROM fabrication method
US6768165B1 (en) 1997-08-01 2004-07-27 Saifun Semiconductors Ltd. Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
US6348711B1 (en) 1998-05-20 2002-02-19 Saifun Semiconductors Ltd. NROM cell with self-aligned programming and erasure areas
US6215148B1 (en) 1998-05-20 2001-04-10 Saifun Semiconductors Ltd. NROM cell with improved programming, erasing and cycling
US6429063B1 (en) 1999-10-26 2002-08-06 Saifun Semiconductors Ltd. NROM cell with generally decoupled primary and secondary injection
US6490204B2 (en) 2000-05-04 2002-12-03 Saifun Semiconductors Ltd. Programming and erasing methods for a reference cell of an NROM array
US7272175B2 (en) 2001-08-16 2007-09-18 Dsp Group Inc. Digital phase locked loop
US7098107B2 (en) 2001-11-19 2006-08-29 Saifun Semiconductor Ltd. Protective layer in memory device and method therefor

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4151021A (en) * 1977-01-26 1979-04-24 Texas Instruments Incorporated Method of making a high density floating gate electrically programmable ROM

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08306687A (ja) * 1995-05-10 1996-11-22 Nec Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
WO1981000790A1 (en) 1981-03-19
EP0035558A1 (de) 1981-09-16

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