JPS56500947A - - Google Patents

Info

Publication number
JPS56500947A
JPS56500947A JP50193380A JP50193380A JPS56500947A JP S56500947 A JPS56500947 A JP S56500947A JP 50193380 A JP50193380 A JP 50193380A JP 50193380 A JP50193380 A JP 50193380A JP S56500947 A JPS56500947 A JP S56500947A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50193380A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS56500947A publication Critical patent/JPS56500947A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09441—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)
JP50193380A 1979-07-27 1980-07-21 Pending JPS56500947A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/061,206 US4292547A (en) 1979-07-27 1979-07-27 IGFET Decode circuit using series-coupled transistors

Publications (1)

Publication Number Publication Date
JPS56500947A true JPS56500947A (ja) 1981-07-09

Family

ID=22034318

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50193380A Pending JPS56500947A (ja) 1979-07-27 1980-07-21

Country Status (5)

Country Link
US (1) US4292547A (ja)
EP (1) EP0032940B1 (ja)
JP (1) JPS56500947A (ja)
DE (1) DE3068192D1 (ja)
WO (1) WO1981000494A1 (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0065022B1 (de) * 1981-05-16 1985-11-27 Deutsche ITT Industries GmbH Integrierter Spannungsteiler mit Auswahlschaltung in Isolierschicht-Feldeffekttransistor-Technik, dessen Abwandlung und seine Verwendung in einem Digital-Analog-Wandler
JPS583185A (ja) * 1981-06-30 1983-01-08 Fujitsu Ltd デコ−ダ回路
US4758744A (en) * 1986-11-26 1988-07-19 Rca Corporation Decoder circuitry with reduced number of inverters and bus lines
US4851716A (en) * 1988-06-09 1989-07-25 National Semiconductor Corporation Single plane dynamic decoder
DE102008037206B4 (de) 2008-08-11 2014-07-03 Heraeus Sensor Technology Gmbh 300°C-Flowsensor

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3665473A (en) * 1970-12-18 1972-05-23 North American Rockwell Address decode logic for a semiconductor memory
DE2557165C3 (de) * 1975-12-18 1979-01-18 Siemens Ag, 1000 Berlin Und 8000 Muenchen Decoderschaltung und ihre Anordnung zur Integrierung auf einem Halbleiterbaustein
US4094012A (en) * 1976-10-01 1978-06-06 Intel Corporation Electrically programmable MOS read-only memory with isolated decoders
US4103349A (en) * 1977-06-16 1978-07-25 Rockwell International Corporation Output address decoder with gating logic for increased speed and less chip area
US4124900A (en) * 1977-09-29 1978-11-07 Westinghouse Electric Corp. Memory using interleaved rows to permit closer spacing

Also Published As

Publication number Publication date
WO1981000494A1 (en) 1981-02-19
EP0032940A1 (en) 1981-08-05
DE3068192D1 (en) 1984-07-19
EP0032940A4 (en) 1981-11-11
EP0032940B1 (en) 1984-06-13
US4292547A (en) 1981-09-29

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