JPS5647999A - Initializing method of memory - Google Patents

Initializing method of memory

Info

Publication number
JPS5647999A
JPS5647999A JP12186779A JP12186779A JPS5647999A JP S5647999 A JPS5647999 A JP S5647999A JP 12186779 A JP12186779 A JP 12186779A JP 12186779 A JP12186779 A JP 12186779A JP S5647999 A JPS5647999 A JP S5647999A
Authority
JP
Japan
Prior art keywords
memory
address
initialization
flow
ram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12186779A
Other languages
Japanese (ja)
Inventor
Noriyuki Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12186779A priority Critical patent/JPS5647999A/en
Publication of JPS5647999A publication Critical patent/JPS5647999A/en
Pending legal-status Critical Current

Links

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  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE: To initialize a memory easily without judging ROM and RAM, by performing initialization as to only an address where a parity error has occured.
CONSTITUTION: Setting an address to an initial value after the electric power source is turned on reads the corresponding address contents of the memory according to read operation flow 23. Then, a parity check is made according to error decision flow 24 and only when an error occurs, write operation is performed according to write operation flow 25 to attain initialization. Next, similar flow operation is carried out with the address increased for initialization. This system eliminates the need to decide ROM and RAM and the memory can easily be initialized.
COPYRIGHT: (C)1981,JPO&Japio
JP12186779A 1979-09-21 1979-09-21 Initializing method of memory Pending JPS5647999A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12186779A JPS5647999A (en) 1979-09-21 1979-09-21 Initializing method of memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12186779A JPS5647999A (en) 1979-09-21 1979-09-21 Initializing method of memory

Publications (1)

Publication Number Publication Date
JPS5647999A true JPS5647999A (en) 1981-04-30

Family

ID=14821884

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12186779A Pending JPS5647999A (en) 1979-09-21 1979-09-21 Initializing method of memory

Country Status (1)

Country Link
JP (1) JPS5647999A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58128096A (en) * 1981-12-19 1983-07-30 Fujitsu Ltd Memory clear system
JPH0627942A (en) * 1993-04-15 1994-02-04 Kawai Musical Instr Mfg Co Ltd Electronic musical instrument and its power-on time processing method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58128096A (en) * 1981-12-19 1983-07-30 Fujitsu Ltd Memory clear system
JPS6130305B2 (en) * 1981-12-19 1986-07-12 Fujitsu Ltd
JPH0627942A (en) * 1993-04-15 1994-02-04 Kawai Musical Instr Mfg Co Ltd Electronic musical instrument and its power-on time processing method

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