JPS5642471A - Compensating circuit for crystal defect - Google Patents

Compensating circuit for crystal defect

Info

Publication number
JPS5642471A
JPS5642471A JP11811479A JP11811479A JPS5642471A JP S5642471 A JPS5642471 A JP S5642471A JP 11811479 A JP11811479 A JP 11811479A JP 11811479 A JP11811479 A JP 11811479A JP S5642471 A JPS5642471 A JP S5642471A
Authority
JP
Japan
Prior art keywords
crystal defect
memory
picture
supplied
field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11811479A
Other languages
Japanese (ja)
Inventor
Fumio Nagumo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP11811479A priority Critical patent/JPS5642471A/en
Publication of JPS5642471A publication Critical patent/JPS5642471A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/63—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to dark current

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To reduce the capacity of a memory for compensation signal storage by storing only corresponding picture-element information on horizontal lines adjacent to crystal defect picture elements in a field of picture elements with a crystal defect and in another field. CONSTITUTION:Image pickup device 1 composed of CCD is supplied with horizontal and vertical driving pulses phiH and phiV from synchronizing circuit 2 and readout picture information is supplied to sample holding circuit 3, the output of which is supplied partially to memory 5 via A/D converter 4. In this case, if only piclure elements in an odd-numbered field have a crystal defect, a compensation signal is written in memory 5 when a signal of picture element of a fixedly numbered horizontal line in an even-numbered field. This write operation is performed as many times as the number of crystal defects and compensation signals are all written in memory 5. Then when picture-element information on the crystal defect is read out, multiplexer 7 is changed over to read the compensation signal of the crystal defect position out of memory 5 and the signal is D/A-converted 6 and further converted into an analog value, which is output.
JP11811479A 1979-09-14 1979-09-14 Compensating circuit for crystal defect Pending JPS5642471A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11811479A JPS5642471A (en) 1979-09-14 1979-09-14 Compensating circuit for crystal defect

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11811479A JPS5642471A (en) 1979-09-14 1979-09-14 Compensating circuit for crystal defect

Publications (1)

Publication Number Publication Date
JPS5642471A true JPS5642471A (en) 1981-04-20

Family

ID=14728365

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11811479A Pending JPS5642471A (en) 1979-09-14 1979-09-14 Compensating circuit for crystal defect

Country Status (1)

Country Link
JP (1) JPS5642471A (en)

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