JPS5636728A - Input-output controller - Google Patents

Input-output controller

Info

Publication number
JPS5636728A
JPS5636728A JP11265379A JP11265379A JPS5636728A JP S5636728 A JPS5636728 A JP S5636728A JP 11265379 A JP11265379 A JP 11265379A JP 11265379 A JP11265379 A JP 11265379A JP S5636728 A JPS5636728 A JP S5636728A
Authority
JP
Japan
Prior art keywords
input
output unit
output
processor
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11265379A
Other languages
Japanese (ja)
Inventor
Yoshiharu Iwamoto
Takahiko Yamada
Shuji Miki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Nippon Telegraph and Telephone Corp filed Critical Hitachi Ltd
Priority to JP11265379A priority Critical patent/JPS5636728A/en
Publication of JPS5636728A publication Critical patent/JPS5636728A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make it possible for processors to use input-output units simultaneously, by providing a memory unit in which processor numbers are made to correspond to input-output unit numbers.
CONSTITUTION: Memory unit 34, storing coordinates between input-output units and processors, has as an input circuit the IO address selecting circuit consisting of input-output unit number line gate 31 from processor 10, gate 32 of the input-output unit number line from input-output unit interface part 20, and OR gates 33 for them and is further equipped as output circuits gate groups 350W352 that select control lines operating respective processor interface parts 41W43 and interruption permission selecting circuits 360W363 that select interruption permitting signals from processor interface parts 41W43 and transfer them to input-output unit interface part 20.
COPYRIGHT: (C)1981,JPO&Japio
JP11265379A 1979-09-03 1979-09-03 Input-output controller Pending JPS5636728A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11265379A JPS5636728A (en) 1979-09-03 1979-09-03 Input-output controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11265379A JPS5636728A (en) 1979-09-03 1979-09-03 Input-output controller

Publications (1)

Publication Number Publication Date
JPS5636728A true JPS5636728A (en) 1981-04-10

Family

ID=14592106

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11265379A Pending JPS5636728A (en) 1979-09-03 1979-09-03 Input-output controller

Country Status (1)

Country Link
JP (1) JPS5636728A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6214255A (en) * 1985-07-11 1987-01-22 Nec Corp Multi processing system for input output interruption

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6214255A (en) * 1985-07-11 1987-01-22 Nec Corp Multi processing system for input output interruption

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