JPS5634258A - Frame sequence number control system - Google Patents

Frame sequence number control system

Info

Publication number
JPS5634258A
JPS5634258A JP10910179A JP10910179A JPS5634258A JP S5634258 A JPS5634258 A JP S5634258A JP 10910179 A JP10910179 A JP 10910179A JP 10910179 A JP10910179 A JP 10910179A JP S5634258 A JPS5634258 A JP S5634258A
Authority
JP
Japan
Prior art keywords
transmission
station
receiving
sequence number
rsnr
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10910179A
Other languages
Japanese (ja)
Other versions
JPS6138895B2 (en
Inventor
Takushi Hamada
Seiichi Yasumoto
Masakazu Okada
Masahiro Takahashi
Hitoshi Fushimi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10910179A priority Critical patent/JPS5634258A/en
Publication of JPS5634258A publication Critical patent/JPS5634258A/en
Publication of JPS6138895B2 publication Critical patent/JPS6138895B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks

Abstract

PURPOSE:To make processings simple to make it possible to cope with change and extension easily, by providing one set for transmission and receiving of buffers for frame sequence number storage in each station in the N-to-M loop transmission system. CONSTITUTION:Information devices ID1-IDn are connected into a loop through transmission line TL by transmission stations ST1-STn, and each transmission station is provided with transmission sequence counter SCC and receiving sequence number register RSNR. The transmission station which has obtained the line occupation right sets sequence number SN to 0 first to perform frame transmission and adds 1 to transmission SN each time a frame is transmitted. The station which is designated as a receiving station compares received transmission SN with SN stored in RSNR by comparator COMP1; and when they agree with each other, signal SNOK indicating the SN has been detected normally is obtained. The value obtained by adding 1 to the value of received transmission SN is stored in RSNR as receiving SN together with the transmission station address. When it is detected that the transmission station has abandoned the line occupation, receiving SN is reset to zero.
JP10910179A 1979-08-29 1979-08-29 Frame sequence number control system Granted JPS5634258A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10910179A JPS5634258A (en) 1979-08-29 1979-08-29 Frame sequence number control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10910179A JPS5634258A (en) 1979-08-29 1979-08-29 Frame sequence number control system

Publications (2)

Publication Number Publication Date
JPS5634258A true JPS5634258A (en) 1981-04-06
JPS6138895B2 JPS6138895B2 (en) 1986-09-01

Family

ID=14501597

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10910179A Granted JPS5634258A (en) 1979-08-29 1979-08-29 Frame sequence number control system

Country Status (1)

Country Link
JP (1) JPS5634258A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5933955A (en) * 1982-08-20 1984-02-24 Hitachi Ltd Loop transmitting system
JPS61123341A (en) * 1984-11-20 1986-06-11 Nec Corp Time divisional relay exchange system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53121501A (en) * 1977-03-31 1978-10-24 Mitsubishi Electric Corp Loop transmission system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53121501A (en) * 1977-03-31 1978-10-24 Mitsubishi Electric Corp Loop transmission system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5933955A (en) * 1982-08-20 1984-02-24 Hitachi Ltd Loop transmitting system
JPS61123341A (en) * 1984-11-20 1986-06-11 Nec Corp Time divisional relay exchange system

Also Published As

Publication number Publication date
JPS6138895B2 (en) 1986-09-01

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