|
FR2257213A5
(US07902200-20110308-C00112.png)
*
|
1973-12-04 |
1975-08-01 |
Cii |
|
|
JPS5729797B2
(US07902200-20110308-C00112.png)
*
|
1975-01-16 |
1982-06-24 |
|
|
|
US4005405A
(en)
*
|
1975-05-07 |
1977-01-25 |
Data General Corporation |
Error detection and correction in data processing systems
|
|
US4072853A
(en)
*
|
1976-09-29 |
1978-02-07 |
Honeywell Information Systems Inc. |
Apparatus and method for storing parity encoded data from a plurality of input/output sources
|
|
US4077565A
(en)
*
|
1976-09-29 |
1978-03-07 |
Honeywell Information Systems Inc. |
Error detection and correction locator circuits
|
|
GB1573329A
(en)
*
|
1976-09-29 |
1980-08-20 |
Honeywell Inf Systems |
Method and apparatu for detecting errors in parity encoded data
|
|
US4117458A
(en)
*
|
1977-03-04 |
1978-09-26 |
Grumman Aerospace Corporation |
High speed double error correction plus triple error detection system
|
|
US4171765A
(en)
*
|
1977-08-29 |
1979-10-23 |
Data General Corporation |
Error detection system
|
|
US4295219A
(en)
*
|
1980-03-31 |
1981-10-13 |
Bell Telephone Laboratories, Incorporated |
Memory write error detection circuit
|
|
GB2136614B
(en)
*
|
1980-06-25 |
1985-06-05 |
Sundstrand Data Control |
Recording digital data
|
|
US4433388A
(en)
*
|
1980-10-06 |
1984-02-21 |
Ncr Corporation |
Longitudinal parity
|
|
IT1202527B
(it)
*
|
1987-02-12 |
1989-02-09 |
Honeywell Inf Systems |
Sistema di memoria e relativo apparato di rivelazione-correzione di errore
|
|
US4817095A
(en)
*
|
1987-05-15 |
1989-03-28 |
Digital Equipment Corporation |
Byte write error code method and apparatus
|
|
JPH0821238B2
(ja)
*
|
1987-11-12 |
1996-03-04 |
三菱電機株式会社 |
半導体記憶装置
|
|
US4884271A
(en)
*
|
1987-12-28 |
1989-11-28 |
International Business Machines Corporation |
Error checking and correcting for read-modified-write operations
|
|
US4918695A
(en)
*
|
1988-08-30 |
1990-04-17 |
Unisys Corporation |
Failure detection for partial write operations for memories
|
|
US5420983A
(en)
*
|
1992-08-12 |
1995-05-30 |
Digital Equipment Corporation |
Method for merging memory blocks, fetching associated disk chunk, merging memory blocks with the disk chunk, and writing the merged data
|
|
US6047396A
(en)
*
|
1992-10-14 |
2000-04-04 |
Tm Patents, L.P. |
Digital data storage system including phantom bit storage locations
|
|
US5914953A
(en)
*
|
1992-12-17 |
1999-06-22 |
Tandem Computers, Inc. |
Network message routing using routing table information and supplemental enable information for deadlock prevention
|
|
US6701480B1
(en)
*
|
2000-03-08 |
2004-03-02 |
Rockwell Automation Technologies, Inc. |
System and method for providing error check and correction in memory systems
|
|
FR2831971A1
(fr)
*
|
2001-11-02 |
2003-05-09 |
Iroc Technologies |
Procede de memorisation de donnees avec correction d'erreur
|
|
FR2831970A1
(fr)
*
|
2001-11-02 |
2003-05-09 |
Iroc Technologies |
Procede de memorisation de donnees avec correction d'erreur
|
|
US7051264B2
(en)
*
|
2001-11-14 |
2006-05-23 |
Monolithic System Technology, Inc. |
Error correcting memory and method of operating same
|
|
WO2006057794A2
(en)
*
|
2004-11-23 |
2006-06-01 |
Monolithic System Technology, Inc. |
Transparent error correcting memory that supports partial-word write
|
|
US7392456B2
(en)
|
2004-11-23 |
2008-06-24 |
Mosys, Inc. |
Predictive error correction code generation facilitating high-speed byte-write in a semiconductor memory
|
|
EP2169555A4
(en)
*
|
2007-06-20 |
2011-01-05 |
Fujitsu Ltd |
CACHE CONTROL, CACHE CONTROL PROCEDURE AND CACHE CONTROL PROGRAM
|
|
JP4878606B2
(ja)
*
|
2008-04-01 |
2012-02-15 |
エナジーサポート株式会社 |
消弧装置
|
|
US7814300B2
(en)
|
2008-04-30 |
2010-10-12 |
Freescale Semiconductor, Inc. |
Configurable pipeline to process an operation at alternate pipeline stages depending on ECC/parity protection mode of memory access
|
|
US9658780B2
(en)
|
2011-09-16 |
2017-05-23 |
Avalanche Technology, Inc. |
Magnetic random access memory with dynamic random access memory (DRAM)-like interface
|
|
US8751905B2
(en)
|
2011-09-16 |
2014-06-10 |
Avalanche Technology, Inc. |
Memory with on-chip error correction
|
|
US9251882B2
(en)
|
2011-09-16 |
2016-02-02 |
Avalanche Technology, Inc. |
Magnetic random access memory with dynamic random access memory (DRAM)-like interface
|
|
US20140344643A1
(en)
*
|
2013-05-14 |
2014-11-20 |
John H. Hughes, Jr. |
Hybrid memory protection method and apparatus
|
|
US9559726B2
(en)
*
|
2015-06-15 |
2017-01-31 |
Intel Corporation |
Use of error correcting code to carry additional data bits
|
|
US9766975B2
(en)
|
2015-09-01 |
2017-09-19 |
International Business Machines Corporation |
Partial ECC handling for a byte-write capable register
|
|
US9985655B2
(en)
|
2015-09-01 |
2018-05-29 |
International Business Machines Corporation |
Generating ECC values for byte-write capable registers
|
|
US10176038B2
(en)
*
|
2015-09-01 |
2019-01-08 |
International Business Machines Corporation |
Partial ECC mechanism for a byte-write capable register
|
|
KR102638790B1
(ko)
*
|
2016-09-13 |
2024-02-21 |
에스케이하이닉스 주식회사 |
반도체장치 및 반도체시스템
|
