JPS5623048A - Control circuit for signal level - Google Patents

Control circuit for signal level

Info

Publication number
JPS5623048A
JPS5623048A JP9889579A JP9889579A JPS5623048A JP S5623048 A JPS5623048 A JP S5623048A JP 9889579 A JP9889579 A JP 9889579A JP 9889579 A JP9889579 A JP 9889579A JP S5623048 A JPS5623048 A JP S5623048A
Authority
JP
Japan
Prior art keywords
current
transistor
circuit
collector
signal level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9889579A
Other languages
Japanese (ja)
Other versions
JPS5915579B2 (en
Inventor
Koji Ishida
Tadashi Noguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Priority to JP9889579A priority Critical patent/JPS5915579B2/en
Publication of JPS5623048A publication Critical patent/JPS5623048A/en
Publication of JPS5915579B2 publication Critical patent/JPS5915579B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H20/00—Arrangements for broadcast or for distribution combined with broadcast
    • H04H20/86—Arrangements characterised by the broadcast information itself
    • H04H20/88—Stereophonic broadcast systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H40/00—Arrangements specially adapted for receiving broadcast information
    • H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • H04H40/45—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
    • H04H40/72—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving for noise suppression

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Noise Elimination (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE:To simplify the circuit constitution and to make accurate the signal level controlling operation, by constituting the circuit with the active element shunting the constant current according to the control signal level, current mirror circuit and differential circuit. CONSTITUTION:If no control input signal is present, equal current flows to the differential transistors Q20, Q21 of the input stage, the collector current of the transistor Q21 is balanced with that of transistor Q27 and the output current of the DC amplifier 13 is zero. If the control input voltage is changed and the base voltage of the transistor Q21 increases, the collector current of the transistor Q21 is decreased accordingly, and the collector current of the transistor Q20 increases by the decrement. The current equal to the collector current of the transistor Q20 flows to the transistor Q26 of the current mirror circuit, and since this current is transferred to the transistor Q27, the current difference between the collector currents of the transistors Q21, Q27 is the output current of the DC amplifier 13 to be the current source of the current switching circuit of the current control attenuator 14.
JP9889579A 1979-08-02 1979-08-02 signal level control circuit Expired JPS5915579B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9889579A JPS5915579B2 (en) 1979-08-02 1979-08-02 signal level control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9889579A JPS5915579B2 (en) 1979-08-02 1979-08-02 signal level control circuit

Publications (2)

Publication Number Publication Date
JPS5623048A true JPS5623048A (en) 1981-03-04
JPS5915579B2 JPS5915579B2 (en) 1984-04-10

Family

ID=14231858

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9889579A Expired JPS5915579B2 (en) 1979-08-02 1979-08-02 signal level control circuit

Country Status (1)

Country Link
JP (1) JPS5915579B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60138774U (en) * 1984-02-27 1985-09-13 株式会社パイロット writing instrument cap
JPS61140880U (en) * 1985-02-20 1986-09-01

Also Published As

Publication number Publication date
JPS5915579B2 (en) 1984-04-10

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