JPS5619646A - Resin sealing type semiconductor device - Google Patents

Resin sealing type semiconductor device

Info

Publication number
JPS5619646A
JPS5619646A JP9500679A JP9500679A JPS5619646A JP S5619646 A JPS5619646 A JP S5619646A JP 9500679 A JP9500679 A JP 9500679A JP 9500679 A JP9500679 A JP 9500679A JP S5619646 A JPS5619646 A JP S5619646A
Authority
JP
Japan
Prior art keywords
tab
semiconductor device
type semiconductor
resin sealing
sealing type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9500679A
Other languages
Japanese (ja)
Inventor
Hiroshi Mikino
Susumu Okikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9500679A priority Critical patent/JPS5619646A/en
Publication of JPS5619646A publication Critical patent/JPS5619646A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49503Lead-frames or other flat leads characterised by the die pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H01L2224/48249Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item the bond pad protruding from the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

PURPOSE:To eliminate the tab short-circuit of the resin sealed device by a method wherein a stepped suction is provided on a side having a crossing point of the tub and a connection line. CONSTITUTION:The stepped section 113a is provided on one main surface 111 of the tab 11 and, therefore, it has a smaller area than the other main surface 112. A lead piece 12 is located on the same plane surface as the tab 11. In this constitution, the tab short-circuit caused by a sagging of wire 14 can be prevented even when the tab 11 and the lead piece 12 are located on the same plane surface. When the tab is formed by performing a plastic processing, the peripheral portion of the stepped section 113a is protruding and this increases the adhesive strength of the resin 15 and the tab 11.
JP9500679A 1979-07-27 1979-07-27 Resin sealing type semiconductor device Pending JPS5619646A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9500679A JPS5619646A (en) 1979-07-27 1979-07-27 Resin sealing type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9500679A JPS5619646A (en) 1979-07-27 1979-07-27 Resin sealing type semiconductor device

Publications (1)

Publication Number Publication Date
JPS5619646A true JPS5619646A (en) 1981-02-24

Family

ID=14125839

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9500679A Pending JPS5619646A (en) 1979-07-27 1979-07-27 Resin sealing type semiconductor device

Country Status (1)

Country Link
JP (1) JPS5619646A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58191652U (en) * 1982-06-15 1983-12-20 三菱電機株式会社 Frame for semiconductor devices
US4503452A (en) * 1981-05-18 1985-03-05 Matsushita Electronics Corporation Plastic encapsulated semiconductor device and method for manufacturing the same
WO2000075986A1 (en) * 1999-06-03 2000-12-14 Amkor Technology, Inc. Plastic package for an optical integrated circuit device and method of making
JP2002184911A (en) * 2000-12-15 2002-06-28 Nippon Inter Electronics Corp Resin sealed electronic component
EP0895287A3 (en) * 1997-07-31 2006-04-05 Matsushita Electric Industrial Co., Ltd. Semiconductor device and lead frame for the same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4503452A (en) * 1981-05-18 1985-03-05 Matsushita Electronics Corporation Plastic encapsulated semiconductor device and method for manufacturing the same
JPS58191652U (en) * 1982-06-15 1983-12-20 三菱電機株式会社 Frame for semiconductor devices
EP0895287A3 (en) * 1997-07-31 2006-04-05 Matsushita Electric Industrial Co., Ltd. Semiconductor device and lead frame for the same
WO2000075986A1 (en) * 1999-06-03 2000-12-14 Amkor Technology, Inc. Plastic package for an optical integrated circuit device and method of making
US6274927B1 (en) 1999-06-03 2001-08-14 Amkor Technology, Inc. Plastic package for an optical integrated circuit device and method of making
US6420204B2 (en) 1999-06-03 2002-07-16 Amkor Technology, Inc. Method of making a plastic package for an optical integrated circuit device
JP2002184911A (en) * 2000-12-15 2002-06-28 Nippon Inter Electronics Corp Resin sealed electronic component

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