JPS5617437A - Loading system for nonresident program - Google Patents

Loading system for nonresident program

Info

Publication number
JPS5617437A
JPS5617437A JP9395979A JP9395979A JPS5617437A JP S5617437 A JPS5617437 A JP S5617437A JP 9395979 A JP9395979 A JP 9395979A JP 9395979 A JP9395979 A JP 9395979A JP S5617437 A JPS5617437 A JP S5617437A
Authority
JP
Japan
Prior art keywords
program
memory unit
file
loading system
auxiliary memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9395979A
Other languages
Japanese (ja)
Inventor
Shigeki Yanagida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9395979A priority Critical patent/JPS5617437A/en
Publication of JPS5617437A publication Critical patent/JPS5617437A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To shorten the loading time of a main memory unit by previously linking and registering a program loaded into an auxiliary memory unit and another program used by referring to the program.
CONSTITUTION: Auxiliary memory unit 3 cnsists of files (1), (2) and (3); file (1) possesses a group of program A, program AB and program BB, program B and program Z, file (2) has a group of program B and program BB, and file (3) has program BA and program BB. Program A and program AB, while registered in auxiliary memory unit 3, are linked together and program AB and program BB are similarly linked together. When a request for loading program A is made, a program loop of programs A, AB and BB is all loaded into the main memory unit and processing is started.
COPYRIGHT: (C)1981,JPO&Japio
JP9395979A 1979-07-23 1979-07-23 Loading system for nonresident program Pending JPS5617437A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9395979A JPS5617437A (en) 1979-07-23 1979-07-23 Loading system for nonresident program

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9395979A JPS5617437A (en) 1979-07-23 1979-07-23 Loading system for nonresident program

Publications (1)

Publication Number Publication Date
JPS5617437A true JPS5617437A (en) 1981-02-19

Family

ID=14096945

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9395979A Pending JPS5617437A (en) 1979-07-23 1979-07-23 Loading system for nonresident program

Country Status (1)

Country Link
JP (1) JPS5617437A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01142936A (en) * 1987-11-30 1989-06-05 Matsushita Electric Ind Co Ltd Information connecting method
JPH01207824A (en) * 1988-02-16 1989-08-21 Fujitsu Ltd Module coupling control system
JPH07105021A (en) * 1993-06-15 1995-04-21 Xerox Corp Processing emulation method of multiprocessing pipeline data
JPH07105020A (en) * 1993-06-15 1995-04-21 Xerox Corp Pipelined image processing system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01142936A (en) * 1987-11-30 1989-06-05 Matsushita Electric Ind Co Ltd Information connecting method
JPH01207824A (en) * 1988-02-16 1989-08-21 Fujitsu Ltd Module coupling control system
JPH07105021A (en) * 1993-06-15 1995-04-21 Xerox Corp Processing emulation method of multiprocessing pipeline data
JPH07105020A (en) * 1993-06-15 1995-04-21 Xerox Corp Pipelined image processing system

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