JPS56162576A - Mode display circuit of voice multiplex receiver or the like - Google Patents

Mode display circuit of voice multiplex receiver or the like

Info

Publication number
JPS56162576A
JPS56162576A JP6727180A JP6727180A JPS56162576A JP S56162576 A JPS56162576 A JP S56162576A JP 6727180 A JP6727180 A JP 6727180A JP 6727180 A JP6727180 A JP 6727180A JP S56162576 A JPS56162576 A JP S56162576A
Authority
JP
Japan
Prior art keywords
circuit
output
interface
display
mode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6727180A
Other languages
Japanese (ja)
Other versions
JPS622750B2 (en
Inventor
Kenji Terasawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP6727180A priority Critical patent/JPS56162576A/en
Publication of JPS56162576A publication Critical patent/JPS56162576A/en
Publication of JPS622750B2 publication Critical patent/JPS622750B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/60—Receiver circuitry for the reception of television signals according to analogue transmission standards for the sound signals
    • H04N5/607—Receiver circuitry for the reception of television signals according to analogue transmission standards for the sound signals for more than one sound signal, e.g. stereo, multilanguages

Abstract

PURPOSE:To display many modes accurately with simple constitution by supplying a two-or three-mode interface output to a circuit to be controlled by combining a two-state signal appearing at the output terminal of a control signal generating circuit. CONSTITUTION:An interface circuit is arranged between a control signal generating circuit CG and voice multiplex signal demodulating LA and this circuit is composed of an input interface circuit IF, an output interface circuit OF, and a dual circut DO in sequence when the circuit is viewed from a generating circuit CG side. Those circuit OF and DO are provided with the 4th and 5th transistor TRs T4 and T5 for a buffer connected to the 1st and 2nd output terminals O1 and O2 of the circuit CG, and LEDs lM, lB and lMS for reception mode display, and the other are connected to read-mode control input terminals 11 and 12 of LA. Further, the circuit IF is provided with TRs T1 and T2 and LEDs LS and LM for display connected to reception mode discrimination output terminals 16 and 17 of the LA, and the others are connected to input terminals I1 and I2 of the circuit CG and the terminal O2 via a TRT6.
JP6727180A 1980-05-20 1980-05-20 Mode display circuit of voice multiplex receiver or the like Granted JPS56162576A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6727180A JPS56162576A (en) 1980-05-20 1980-05-20 Mode display circuit of voice multiplex receiver or the like

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6727180A JPS56162576A (en) 1980-05-20 1980-05-20 Mode display circuit of voice multiplex receiver or the like

Publications (2)

Publication Number Publication Date
JPS56162576A true JPS56162576A (en) 1981-12-14
JPS622750B2 JPS622750B2 (en) 1987-01-21

Family

ID=13340122

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6727180A Granted JPS56162576A (en) 1980-05-20 1980-05-20 Mode display circuit of voice multiplex receiver or the like

Country Status (1)

Country Link
JP (1) JPS56162576A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5957067U (en) * 1982-10-06 1984-04-13 パイオニア株式会社 display device
JPS6052771U (en) * 1983-09-17 1985-04-13 株式会社ケンウッド Satellite broadcasting additional audio operation mode display device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5957067U (en) * 1982-10-06 1984-04-13 パイオニア株式会社 display device
JPS6052771U (en) * 1983-09-17 1985-04-13 株式会社ケンウッド Satellite broadcasting additional audio operation mode display device
JPH0127331Y2 (en) * 1983-09-17 1989-08-15

Also Published As

Publication number Publication date
JPS622750B2 (en) 1987-01-21

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