JPS5615139B2 - - Google Patents
Info
- Publication number
- JPS5615139B2 JPS5615139B2 JP13886173A JP13886173A JPS5615139B2 JP S5615139 B2 JPS5615139 B2 JP S5615139B2 JP 13886173 A JP13886173 A JP 13886173A JP 13886173 A JP13886173 A JP 13886173A JP S5615139 B2 JPS5615139 B2 JP S5615139B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2273—Test methods
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/30—Marginal testing, e.g. by varying supply voltage
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318577—AC testing, e.g. current testing, burn-in
- G01R31/31858—Delay testing
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US31912272A | 1972-12-29 | 1972-12-29 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS4999280A JPS4999280A (ja) | 1974-09-19 |
| JPS5615139B2 true JPS5615139B2 (ja) | 1981-04-08 |
Family
ID=23240943
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13886173A Expired JPS5615139B2 (ja) | 1972-12-29 | 1973-12-14 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US3781670A (ja) |
| JP (1) | JPS5615139B2 (ja) |
| CA (1) | CA982230A (ja) |
| DE (1) | DE2349607C2 (ja) |
| FR (1) | FR2212551B1 (ja) |
| GB (1) | GB1425190A (ja) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3851245A (en) * | 1973-12-26 | 1974-11-26 | Ibm | Method for determining whether holes in insulated layer of semiconductor substrate are fully open |
| US3961254A (en) * | 1974-12-20 | 1976-06-01 | International Business Machines Corporation | Testing embedded arrays |
| US3961252A (en) * | 1974-12-20 | 1976-06-01 | International Business Machines Corporation | Testing embedded arrays |
| US3961251A (en) * | 1974-12-20 | 1976-06-01 | International Business Machines Corporation | Testing embedded arrays |
| US4091325A (en) * | 1977-02-08 | 1978-05-23 | The United States Of America As Represented By The Secretary Of The Army | Verification technique for checking wrapped wire electronic boards |
| FR2460526A1 (fr) * | 1979-06-29 | 1981-01-23 | Ibm France | Procede de mesure du temps d'acces d'adresse de memoires mettant en oeuvre la technique de recirculation des donnees, et testeur en resultant |
| US4527254A (en) * | 1982-11-15 | 1985-07-02 | International Business Machines Corporation | Dynamic random access memory having separated VDD pads for improved burn-in |
| US5225771A (en) * | 1988-05-16 | 1993-07-06 | Dri Technology Corp. | Making and testing an integrated circuit using high density probe points |
| US4924589A (en) * | 1988-05-16 | 1990-05-15 | Leedy Glenn J | Method of making and testing an integrated circuit |
| US4918377A (en) * | 1988-12-05 | 1990-04-17 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Integrated circuit reliability testing |
| US5039602A (en) * | 1990-03-19 | 1991-08-13 | National Semiconductor Corporation | Method of screening A.C. performance characteristics during D.C. parametric test operation |
| US5095267A (en) * | 1990-03-19 | 1992-03-10 | National Semiconductor Corporation | Method of screening A.C. performance characteristics during D.C. parametric test operation |
| US5254941A (en) * | 1991-10-29 | 1993-10-19 | Sgs-Thomson Microelectronics, Inc. | Structure and method for determining isolation of integrated circuit |
| US5256964A (en) * | 1992-07-31 | 1993-10-26 | International Business Machines Corporation | Tester calibration verification device |
| US5796265A (en) * | 1996-02-29 | 1998-08-18 | Lsi Logic Corporation | Method for metal delay testing in semiconductor devices |
| DE10024476A1 (de) * | 2000-05-18 | 2001-12-20 | Infineon Technologies Ag | Vorrichtung zum Testen einer elektrischen Schaltung |
-
1972
- 1972-12-29 US US00319122A patent/US3781670A/en not_active Expired - Lifetime
-
1973
- 1973-10-03 DE DE2349607A patent/DE2349607C2/de not_active Expired
- 1973-11-01 CA CA184,829A patent/CA982230A/en not_active Expired
- 1973-11-20 FR FR7342434A patent/FR2212551B1/fr not_active Expired
- 1973-12-10 GB GB5713973A patent/GB1425190A/en not_active Expired
- 1973-12-14 JP JP13886173A patent/JPS5615139B2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| DE2349607A1 (de) | 1974-07-04 |
| FR2212551A1 (ja) | 1974-07-26 |
| US3781670A (en) | 1973-12-25 |
| GB1425190A (en) | 1976-02-18 |
| FR2212551B1 (ja) | 1981-05-29 |
| CA982230A (en) | 1976-01-20 |
| JPS4999280A (ja) | 1974-09-19 |
| DE2349607C2 (de) | 1983-09-29 |