JPS5615054A - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPS5615054A
JPS5615054A JP9079079A JP9079079A JPS5615054A JP S5615054 A JPS5615054 A JP S5615054A JP 9079079 A JP9079079 A JP 9079079A JP 9079079 A JP9079079 A JP 9079079A JP S5615054 A JPS5615054 A JP S5615054A
Authority
JP
Japan
Prior art keywords
case
cover
adhered
substrate
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9079079A
Other languages
Japanese (ja)
Inventor
Katsuhiko Fukumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9079079A priority Critical patent/JPS5615054A/en
Publication of JPS5615054A publication Critical patent/JPS5615054A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To sufficiently adhere a cover to a case in the hybrid integrated circuit device by forming a partition wall for enclosing resin therein surrounding a substrate between a portion to adhere the substrate of the case for containing the substrate and the peripheral wall adhered with the cover thereto. CONSTITUTION:The partition wall 21 is higher than the upper surface of the hybrid integrated circuit substrate 1 adhered to the case 2 in a direction of the cover 3 from the bottom of the case 2 and lower than the portion of the case 2 adhered with the cover 3 as projected to surround the substrate 1 and enclose resin 5 in the interior surrounded thereby. As a result, since the resin 5 is enclosed in the interior surrounded by the partition wall 21, the resin 5 is not adhered to the portion of the case 2 to be adhered with the cover 3 so as to sufficiently adhere the cover 3 to the case 2.
JP9079079A 1979-07-16 1979-07-16 Hybrid integrated circuit device Pending JPS5615054A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9079079A JPS5615054A (en) 1979-07-16 1979-07-16 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9079079A JPS5615054A (en) 1979-07-16 1979-07-16 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPS5615054A true JPS5615054A (en) 1981-02-13

Family

ID=14008377

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9079079A Pending JPS5615054A (en) 1979-07-16 1979-07-16 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5615054A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58148438A (en) * 1982-02-27 1983-09-03 Toshiba Chem Corp Plastic ic chip package
JPS62284085A (en) * 1986-02-14 1987-12-09 Ricoh Co Ltd Production of hexagonal ferrite film and magnetic recording medium
JP2019102575A (en) * 2017-11-30 2019-06-24 三菱電機株式会社 Semiconductor device and power conversion device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58148438A (en) * 1982-02-27 1983-09-03 Toshiba Chem Corp Plastic ic chip package
JPS62284085A (en) * 1986-02-14 1987-12-09 Ricoh Co Ltd Production of hexagonal ferrite film and magnetic recording medium
JP2019102575A (en) * 2017-11-30 2019-06-24 三菱電機株式会社 Semiconductor device and power conversion device

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