JPS56122131A - Resin-sealed type semiconductor device - Google Patents
Resin-sealed type semiconductor deviceInfo
- Publication number
- JPS56122131A JPS56122131A JP2513880A JP2513880A JPS56122131A JP S56122131 A JPS56122131 A JP S56122131A JP 2513880 A JP2513880 A JP 2513880A JP 2513880 A JP2513880 A JP 2513880A JP S56122131 A JPS56122131 A JP S56122131A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- elements
- enclosure
- semiconductor device
- type semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 4
- 239000011347 resin Substances 0.000 abstract 3
- 229920005989 resin Polymers 0.000 abstract 3
- 239000012535 impurity Substances 0.000 abstract 2
- 239000008188 pellet Substances 0.000 abstract 2
- 238000007789 sealing Methods 0.000 abstract 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
- H01L29/045—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Computer Hardware Design (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
- Die Bonding (AREA)
Abstract
PURPOSE:To eliminate the variation in anisotropic resistance of a resin-sealed type semiconductor device by setting a semiconductor pellet in which an N type resistance element of predetermined surface impurity density is formed in a (100) crystalline surface so that the element is directed at 45 deg. of the longitudinal direction of an enclosure and sealing it with the resin. CONSTITUTION:N type resistance elements 12, 13 having 4X10<18>-3X10<20>cm<-3> of surface impurity density are formed in parallel with or perpendicularly to the (100) crystalline axial direction on a semiconductor pellet 11. The elements are placed fixedly on a mount base 16, wire bonded to metallic leads 14, and molded in a rectangular enclosure 15 of insulating resin. At this time the directions of the elements 12, 13 are inclined at 45 deg. with respect to the longitudinal direction of the enclosure. Thus, anisotropic resistance change caused by strain due to the resin sealing can be eliminated to improve the electric characteristics.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2513880A JPS56122131A (en) | 1980-02-29 | 1980-02-29 | Resin-sealed type semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2513880A JPS56122131A (en) | 1980-02-29 | 1980-02-29 | Resin-sealed type semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56122131A true JPS56122131A (en) | 1981-09-25 |
Family
ID=12157603
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2513880A Pending JPS56122131A (en) | 1980-02-29 | 1980-02-29 | Resin-sealed type semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56122131A (en) |
-
1980
- 1980-02-29 JP JP2513880A patent/JPS56122131A/en active Pending
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