JPS56117407A - Amplifying device - Google Patents

Amplifying device

Info

Publication number
JPS56117407A
JPS56117407A JP2010080A JP2010080A JPS56117407A JP S56117407 A JPS56117407 A JP S56117407A JP 2010080 A JP2010080 A JP 2010080A JP 2010080 A JP2010080 A JP 2010080A JP S56117407 A JPS56117407 A JP S56117407A
Authority
JP
Japan
Prior art keywords
circuit
resistance
lowering
capacitor
acoustic signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2010080A
Other languages
Japanese (ja)
Inventor
Hideki Sakano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP2010080A priority Critical patent/JPS56117407A/en
Publication of JPS56117407A publication Critical patent/JPS56117407A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE: To prevent the lowering of both the frequency characteristics and S/N that are caused by the impedance of a connection cord, by providing a by-pass circuit.
CONSTITUTION: A by-pass circuit Z0 consisting of a capacitor C and a resistance R is connected between the feedback input terminal 28 of the amplifier 12 and the earth. The value is set at C=l/r2 and R=r [(l) and (r): inductance and resistance of connection cord l2] for the capacitor C and the resistance R. The power supply switch is turned on, and the muting switch s is closed. Thus the acoustic signal supplied to the input terminal IN is amplified through the amplifying circuit 14 and then supplied to the speaker 22 via the muting switch S and the external output terminal 20A. In this case, the input voltage of the feedback circuit 30 does not increase although the frequency of the acoustic signal increases since the inductance component of the cord l2 is negated by the circuit Z0. As a result, an extraordinary increase of gain or lowering of S/N can be avoided.
COPYRIGHT: (C)1981,JPO&Japio
JP2010080A 1980-02-20 1980-02-20 Amplifying device Pending JPS56117407A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2010080A JPS56117407A (en) 1980-02-20 1980-02-20 Amplifying device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010080A JPS56117407A (en) 1980-02-20 1980-02-20 Amplifying device

Publications (1)

Publication Number Publication Date
JPS56117407A true JPS56117407A (en) 1981-09-14

Family

ID=12017689

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010080A Pending JPS56117407A (en) 1980-02-20 1980-02-20 Amplifying device

Country Status (1)

Country Link
JP (1) JPS56117407A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5323254A (en) * 1976-08-16 1978-03-03 Toshiba Corp Amplifier equipment

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5323254A (en) * 1976-08-16 1978-03-03 Toshiba Corp Amplifier equipment

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