JPS56116345A - Fm stereo demodulation circuit - Google Patents
Fm stereo demodulation circuitInfo
- Publication number
- JPS56116345A JPS56116345A JP1900780A JP1900780A JPS56116345A JP S56116345 A JPS56116345 A JP S56116345A JP 1900780 A JP1900780 A JP 1900780A JP 1900780 A JP1900780 A JP 1900780A JP S56116345 A JPS56116345 A JP S56116345A
- Authority
- JP
- Japan
- Prior art keywords
- monitor
- voltage
- circuit
- voc5
- oscillation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H40/00—Arrangements specially adapted for receiving broadcast information
- H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
- H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
- H04H40/36—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
- H04H40/45—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D1/00—Demodulation of amplitude-modulated oscillations
- H03D1/22—Homodyne or synchrodyne circuits
- H03D1/2209—Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders
- H03D1/2236—Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders using a phase locked loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H40/00—Arrangements specially adapted for receiving broadcast information
- H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
- H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
- H04H40/36—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
- H04H40/45—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
- H04H40/54—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving generating subcarriers
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Stereo-Broadcasting Methods (AREA)
Abstract
PURPOSE:To make common use of terminals and to reduce the external terminals, by using the monitor terminal of a voltage controlled type oscillation circuit as the oscillation stop input terminal for the oscillation circuit, in an FM stereo demodulation circuit of PLL system. CONSTITUTION:To the monitor terminal P12 receiving the monitor signal which adjusts the free-run frequency of a voltage contrlled oscillation circuit VOC5 so that it is around 76kHz through the pickup of the output of a frequency dividing circuit 8, a voltage signal in excess of the monitor signal level is compulsively fed externally, allowing the oscillation stop of VOC5. Since the detection level of a voltage detection circuit 15 is set to a given voltage in excess of the monitor output level, the stop operation of VOC5 is not made with the monitor output.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1900780A JPS56116345A (en) | 1980-02-20 | 1980-02-20 | Fm stereo demodulation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1900780A JPS56116345A (en) | 1980-02-20 | 1980-02-20 | Fm stereo demodulation circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56116345A true JPS56116345A (en) | 1981-09-12 |
JPS6317256B2 JPS6317256B2 (en) | 1988-04-13 |
Family
ID=11987448
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1900780A Granted JPS56116345A (en) | 1980-02-20 | 1980-02-20 | Fm stereo demodulation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56116345A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5399784A (en) * | 1977-02-10 | 1978-08-31 | Nec Corp | Integrated circuit device |
-
1980
- 1980-02-20 JP JP1900780A patent/JPS56116345A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5399784A (en) * | 1977-02-10 | 1978-08-31 | Nec Corp | Integrated circuit device |
Also Published As
Publication number | Publication date |
---|---|
JPS6317256B2 (en) | 1988-04-13 |
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