JPS5611563A - Check and accounting system of electronic register - Google Patents

Check and accounting system of electronic register

Info

Publication number
JPS5611563A
JPS5611563A JP8769879A JP8769879A JPS5611563A JP S5611563 A JPS5611563 A JP S5611563A JP 8769879 A JP8769879 A JP 8769879A JP 8769879 A JP8769879 A JP 8769879A JP S5611563 A JPS5611563 A JP S5611563A
Authority
JP
Japan
Prior art keywords
total
data
memory
print
bus line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8769879A
Other languages
Japanese (ja)
Inventor
Hiroshi Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP8769879A priority Critical patent/JPS5611563A/en
Publication of JPS5611563A publication Critical patent/JPS5611563A/en
Pending legal-status Critical Current

Links

Landscapes

  • Cash Registers Or Receiving Machines (AREA)

Abstract

PURPOSE: To simplify the total and managing job, by locating a plurality of data memory areas to ECR so that the designation of print order for the data memory area group can be made by the user, and printing the same order with different types of ECR.
CONSTITUTION: The group total data such as by sales and by transaction input to the key input section 1 is stored in the total memory 14 via the I/O port 10, and this memory 14 is provided with the print order memory area 18, and total data memory area groups 15W17 respectively storing the sales total by section, person in charge and transaction. To this memory 14, the CPU13 is connected via the address bus line AB, data bus line DB and control bus line CB, and at check or accounting of the total data, the total data of the area groups 15W17 is sequentially read out by group in the order stored in the area 18, and the print drive signal MD is fed to the print section 12 through the I/O port 10, and the total data is printed in matching with the total and managing job of the user.
COPYRIGHT: (C)1981,JPO&Japio
JP8769879A 1979-07-11 1979-07-11 Check and accounting system of electronic register Pending JPS5611563A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8769879A JPS5611563A (en) 1979-07-11 1979-07-11 Check and accounting system of electronic register

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8769879A JPS5611563A (en) 1979-07-11 1979-07-11 Check and accounting system of electronic register

Publications (1)

Publication Number Publication Date
JPS5611563A true JPS5611563A (en) 1981-02-04

Family

ID=13922136

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8769879A Pending JPS5611563A (en) 1979-07-11 1979-07-11 Check and accounting system of electronic register

Country Status (1)

Country Link
JP (1) JPS5611563A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51131240A (en) * 1975-05-10 1976-11-15 Tokyo Electric Co Ltd Electronic register

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51131240A (en) * 1975-05-10 1976-11-15 Tokyo Electric Co Ltd Electronic register

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