JPS56114460A - Synchronizer for loop-shaped transmission line - Google Patents

Synchronizer for loop-shaped transmission line

Info

Publication number
JPS56114460A
JPS56114460A JP1703580A JP1703580A JPS56114460A JP S56114460 A JPS56114460 A JP S56114460A JP 1703580 A JP1703580 A JP 1703580A JP 1703580 A JP1703580 A JP 1703580A JP S56114460 A JPS56114460 A JP S56114460A
Authority
JP
Japan
Prior art keywords
gate
loop
longer
delay time
transmission line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1703580A
Other languages
Japanese (ja)
Inventor
Shogo Nasu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1703580A priority Critical patent/JPS56114460A/en
Publication of JPS56114460A publication Critical patent/JPS56114460A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks
    • H04L12/422—Synchronisation for ring networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Small-Scale Networks (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To prevent data absence and repetition due to collision by providing a delay means for loop delay adjustment in addition to a memory which corrects the total loop delay time according to the distance of a transmission line and the number of station devices. CONSTITUTION:If the loop delay time is longer than transmission frame time by integer times, collision detecting circuit 19 detects that and FF21 is put into operation to close AND gate 23 and to open AND gate 22. Then, data from shift register 15 is to be transmitted via register 20 with a delay time different from that longer than the transmission frame time by integer times, AND gate 22 and OR gate 24 and the loop delay time will deviate from that longer than the transmission frame time by integer times.
JP1703580A 1980-02-14 1980-02-14 Synchronizer for loop-shaped transmission line Pending JPS56114460A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1703580A JPS56114460A (en) 1980-02-14 1980-02-14 Synchronizer for loop-shaped transmission line

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1703580A JPS56114460A (en) 1980-02-14 1980-02-14 Synchronizer for loop-shaped transmission line

Publications (1)

Publication Number Publication Date
JPS56114460A true JPS56114460A (en) 1981-09-09

Family

ID=11932737

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1703580A Pending JPS56114460A (en) 1980-02-14 1980-02-14 Synchronizer for loop-shaped transmission line

Country Status (1)

Country Link
JP (1) JPS56114460A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59126352A (en) * 1983-01-10 1984-07-20 Nec Corp Data highway device
JPS6245247A (en) * 1985-08-23 1987-02-27 Nec Corp Loop delay correction system
JPH0210941A (en) * 1988-06-28 1990-01-16 Toshiba Corp Loop communication system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59126352A (en) * 1983-01-10 1984-07-20 Nec Corp Data highway device
JPS6245247A (en) * 1985-08-23 1987-02-27 Nec Corp Loop delay correction system
JPH0210941A (en) * 1988-06-28 1990-01-16 Toshiba Corp Loop communication system

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