JPS56111908A - Fault diagnosis circuit - Google Patents

Fault diagnosis circuit

Info

Publication number
JPS56111908A
JPS56111908A JP1357180A JP1357180A JPS56111908A JP S56111908 A JPS56111908 A JP S56111908A JP 1357180 A JP1357180 A JP 1357180A JP 1357180 A JP1357180 A JP 1357180A JP S56111908 A JPS56111908 A JP S56111908A
Authority
JP
Japan
Prior art keywords
signal
adder
output
loads
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1357180A
Other languages
Japanese (ja)
Inventor
Akira Inagaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1357180A priority Critical patent/JPS56111908A/en
Publication of JPS56111908A publication Critical patent/JPS56111908A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/006Calibration or setting of parameters

Landscapes

  • Control Of Voltage And Current In General (AREA)
  • Testing And Monitoring For Control Systems (AREA)

Abstract

PURPOSE:To realize a diagnosis in a simple constitution, by comparing the signal obtained by adding the detection signals supplied from a plural number of loads with the upper and lower limit reference values according to the number of loads. CONSTITUTION:The digital control circuit 2 delivers the driving signal 8 and then drives the load 4 via the driver circuit 3. The voltage of a terminal of each is applied to the adder 14 via the buffer amplifier 15. On the other hand, the signal 8 is sent to the encoder 17 to transmit the operation number setting signal 13 to the latch circuit 12 according to the number of loads under a driving state. The D/A converter 16 produces both the upper and lower limit reference signals in accordance with the latched setting signal. The comparators 5<1> and 5<2> compare the output of the adder 14 with the above-mentioned reference signals. In case the output of the adder 14 exceeds the reference range, the signal is sent to the AND gate 6 via the OR gate 6. Then the fault detection signal 10 is delivered when the output of the timing pulse generator circuit 18 exists.
JP1357180A 1980-02-08 1980-02-08 Fault diagnosis circuit Pending JPS56111908A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1357180A JPS56111908A (en) 1980-02-08 1980-02-08 Fault diagnosis circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1357180A JPS56111908A (en) 1980-02-08 1980-02-08 Fault diagnosis circuit

Publications (1)

Publication Number Publication Date
JPS56111908A true JPS56111908A (en) 1981-09-04

Family

ID=11836847

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1357180A Pending JPS56111908A (en) 1980-02-08 1980-02-08 Fault diagnosis circuit

Country Status (1)

Country Link
JP (1) JPS56111908A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007264767A (en) * 2006-03-27 2007-10-11 Fujitsu Ltd Power supply monitoring apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007264767A (en) * 2006-03-27 2007-10-11 Fujitsu Ltd Power supply monitoring apparatus

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