JPS56102135A - Echo signal canceler - Google Patents
Echo signal cancelerInfo
- Publication number
- JPS56102135A JPS56102135A JP430780A JP430780A JPS56102135A JP S56102135 A JPS56102135 A JP S56102135A JP 430780 A JP430780 A JP 430780A JP 430780 A JP430780 A JP 430780A JP S56102135 A JPS56102135 A JP S56102135A
- Authority
- JP
- Japan
- Prior art keywords
- input signal
- alpha
- accumulator
- input
- correction circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/20—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
- H04B3/23—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
PURPOSE:To obtain a focusing speed which is similar to that of the learning identifying method, by cutting over proportional constant alpha which is given to the correction circuit in accordance with the reception input signal level. CONSTITUTION:Reception input signal series Xj which has been input through terminal 4 and digitalized at A/D converter 5 is input into X register 6 and, at the same time, also input into absolute value circuit 11 and absolute values for every sample value are obtained. The output of this circuit 11 is input into accumulator 12, by performing cumulative addition for a prescribed number of samples at the accumulator, and thus the level of reception input signal is obtained. Then, by inputting the output of accumulator 12 into address decoder 13, address decoder 13 selects and reads one alpha out of a plural number of alphak stored in alpha-register 14 and supplies it to correction circuit 8. By this, by cutting over proportional constant alpha which is given to the correction circuit in accordance with the reception input signal level, a focusing speed which is similar to that of learning identifying method is obtained.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP430780A JPS56102135A (en) | 1980-01-18 | 1980-01-18 | Echo signal canceler |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP430780A JPS56102135A (en) | 1980-01-18 | 1980-01-18 | Echo signal canceler |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56102135A true JPS56102135A (en) | 1981-08-15 |
Family
ID=11580833
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP430780A Pending JPS56102135A (en) | 1980-01-18 | 1980-01-18 | Echo signal canceler |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56102135A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5961233A (en) * | 1982-09-29 | 1984-04-07 | Nec Corp | Adaptive type echo erasing device |
-
1980
- 1980-01-18 JP JP430780A patent/JPS56102135A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5961233A (en) * | 1982-09-29 | 1984-04-07 | Nec Corp | Adaptive type echo erasing device |
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