JPS5593380A - Processing system for video signal - Google Patents
Processing system for video signalInfo
- Publication number
- JPS5593380A JPS5593380A JP182379A JP182379A JPS5593380A JP S5593380 A JPS5593380 A JP S5593380A JP 182379 A JP182379 A JP 182379A JP 182379 A JP182379 A JP 182379A JP S5593380 A JPS5593380 A JP S5593380A
- Authority
- JP
- Japan
- Prior art keywords
- address
- display
- signal
- ram4
- designated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To obtain the signal to display picture on television, by porocssing the signal reproduced from the recording media such as cassette tape and record disc to handle the frequency signal at around audio signal band.
CONSTITUTION: The instruction data and display data are included in the signal reproduced from cassette tape recorder and it is inputted to the microcomputer 3 via the demodulator. The content of digital signal is identified, the address is designated to the display RAM4' and color RAM5 to write in the content required for the display. When the address is designated to RAM4' and RAM5 in CPU3, the multiplexer 6 selects that the address bus A is connected to the bus B. The television screen is split into the blocks, 16×12=192, and each block consists of video elements of 8×8, one bit for display RAM4' is assigned to each video element, address is corresponded every 8 video elements arranged longitudinally, the block number is designated, the address is converted based on it, and the data being the content to be displayed is written in RAM.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP182379A JPS5593380A (en) | 1979-01-10 | 1979-01-10 | Processing system for video signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP182379A JPS5593380A (en) | 1979-01-10 | 1979-01-10 | Processing system for video signal |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5593380A true JPS5593380A (en) | 1980-07-15 |
Family
ID=11512274
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP182379A Pending JPS5593380A (en) | 1979-01-10 | 1979-01-10 | Processing system for video signal |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5593380A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60220389A (en) * | 1984-04-18 | 1985-11-05 | 三菱電機株式会社 | Crt display unit |
JPS619689A (en) * | 1984-06-25 | 1986-01-17 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Display system |
JPS61500703A (en) * | 1983-12-14 | 1986-04-10 | テレフンケン フエルンゼ− ウント ルントフンク ゲゼルシヤフト ミツト ベシユレンクテル ハフツング | phase control loop circuit |
JPS61249092A (en) * | 1985-04-26 | 1986-11-06 | 三菱電機株式会社 | Image display unit |
-
1979
- 1979-01-10 JP JP182379A patent/JPS5593380A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61500703A (en) * | 1983-12-14 | 1986-04-10 | テレフンケン フエルンゼ− ウント ルントフンク ゲゼルシヤフト ミツト ベシユレンクテル ハフツング | phase control loop circuit |
JPS60220389A (en) * | 1984-04-18 | 1985-11-05 | 三菱電機株式会社 | Crt display unit |
JPS619689A (en) * | 1984-06-25 | 1986-01-17 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Display system |
JPS61249092A (en) * | 1985-04-26 | 1986-11-06 | 三菱電機株式会社 | Image display unit |
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