JPS5582576A - Data pick up method - Google Patents

Data pick up method

Info

Publication number
JPS5582576A
JPS5582576A JP15609778A JP15609778A JPS5582576A JP S5582576 A JPS5582576 A JP S5582576A JP 15609778 A JP15609778 A JP 15609778A JP 15609778 A JP15609778 A JP 15609778A JP S5582576 A JPS5582576 A JP S5582576A
Authority
JP
Japan
Prior art keywords
slice level
level
value
fleming
comparator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15609778A
Other languages
Japanese (ja)
Inventor
Tetsuo Inose
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP15609778A priority Critical patent/JPS5582576A/en
Publication of JPS5582576A publication Critical patent/JPS5582576A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To automatically assure the optimum slice level at all times even with the variation of data level, by counting the clock signal of a given period to convert into analog value and to form desired slice level, and by picking up the information by it. CONSTITUTION:The clock of the oscillator 13 is counted at the counter 14, it is converted into analog value at the D/A converter 15 to consitute it as the slice level of the first comparator 21. Accompanied with the increase in the count value of the counter 14, the slice level is increased and it reaches the lower limit V2, then Fleming code detection pulse is produced from the Fleming code detection circuit 25 and the count corresponding to the level V2 is latched to the first register 16. When the count value increases and it reaches the upper limit V1 for the slice level, the detection pulse of the circuit 25 is stopped, the gate 28 outputs the slice level dltection signal of upper limit and latches the second register 17. The output of the registers 16, 17 is added 18 and divided 19 into 1/2 value to obtain the intermediate value V0 for the output of the D/A converter 20, and the comparator 22 slices DATA at this V0.
JP15609778A 1978-12-15 1978-12-15 Data pick up method Pending JPS5582576A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15609778A JPS5582576A (en) 1978-12-15 1978-12-15 Data pick up method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15609778A JPS5582576A (en) 1978-12-15 1978-12-15 Data pick up method

Publications (1)

Publication Number Publication Date
JPS5582576A true JPS5582576A (en) 1980-06-21

Family

ID=15620235

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15609778A Pending JPS5582576A (en) 1978-12-15 1978-12-15 Data pick up method

Country Status (1)

Country Link
JP (1) JPS5582576A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7463308B2 (en) 2003-09-29 2008-12-09 Sanyo Electric Co., Ltd. Data slicer circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5187948A (en) * 1975-01-29 1976-07-31 Matsushita Electric Ind Co Ltd

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5187948A (en) * 1975-01-29 1976-07-31 Matsushita Electric Ind Co Ltd

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7463308B2 (en) 2003-09-29 2008-12-09 Sanyo Electric Co., Ltd. Data slicer circuit

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