JPS5577230A - Digital-to-analog converter - Google Patents
Digital-to-analog converterInfo
- Publication number
- JPS5577230A JPS5577230A JP14990978A JP14990978A JPS5577230A JP S5577230 A JPS5577230 A JP S5577230A JP 14990978 A JP14990978 A JP 14990978A JP 14990978 A JP14990978 A JP 14990978A JP S5577230 A JPS5577230 A JP S5577230A
- Authority
- JP
- Japan
- Prior art keywords
- ffs
- signals
- inputted
- digital
- clamp
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To reduce power consumption low by eliminating the occurrence of a glitch while suppressing aperture effect, by providing a digital buffer circuit which can clamp an output to a fixed value in a period shorter than a sampling frequency after input data is inputted.
CONSTITUTION: Digital buffer circuit 2 to which input digital signals D1∼D3 are inputted are provided with FFs 3∼5 corresponding to signals D1∼D3 and signals D1∼ D3 are inputted to FFs 3∼5. Then, read clock pulses CL are inputted to read terminals C of FFs 3∼5 and at the point of a rise of pulse CL, logical states of signals D1∼D3 are written. After certain time shorter than period T of a fixed sampling frequency following the write of those signals, output states of respective FFs are clamped onto fixed logical states at a time by clamp clock pulse CL2 of a clamp terminal. Outputs of FFs 3∼5 are applied to bipole D/A converter 6 for digital-to- analog conversion, thereby outputting analog signal S1.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14990978A JPS5577230A (en) | 1978-12-06 | 1978-12-06 | Digital-to-analog converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14990978A JPS5577230A (en) | 1978-12-06 | 1978-12-06 | Digital-to-analog converter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5577230A true JPS5577230A (en) | 1980-06-10 |
Family
ID=15485234
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14990978A Pending JPS5577230A (en) | 1978-12-06 | 1978-12-06 | Digital-to-analog converter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5577230A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6139626A (en) * | 1984-07-30 | 1986-02-25 | Nec Home Electronics Ltd | Aperture correcting circuit |
| JPS6157130A (en) * | 1984-08-28 | 1986-03-24 | Akai Electric Co Ltd | Digital/analog converting circuit |
-
1978
- 1978-12-06 JP JP14990978A patent/JPS5577230A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6139626A (en) * | 1984-07-30 | 1986-02-25 | Nec Home Electronics Ltd | Aperture correcting circuit |
| JPS6157130A (en) * | 1984-08-28 | 1986-03-24 | Akai Electric Co Ltd | Digital/analog converting circuit |
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