JPS5577081A - Charge transfer type semiconductor device - Google Patents
Charge transfer type semiconductor deviceInfo
- Publication number
- JPS5577081A JPS5577081A JP14943678A JP14943678A JPS5577081A JP S5577081 A JPS5577081 A JP S5577081A JP 14943678 A JP14943678 A JP 14943678A JP 14943678 A JP14943678 A JP 14943678A JP S5577081 A JPS5577081 A JP S5577081A
- Authority
- JP
- Japan
- Prior art keywords
- charges
- semiconductor device
- charge transfer
- transfer type
- type semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/34—Digital stores in which the information is moved stepwise, e.g. shift registers using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C19/36—Digital stores in which the information is moved stepwise, e.g. shift registers using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using multistable semiconductor elements
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Shift Register Type Memory (AREA)
Abstract
PURPOSE:To use only one reference potential generator for a charge transfer type semiconductor device, by generating various reference charges by dummy cells differing in area ratio. CONSTITUTION:Different-area dummy cells 5a, 6a and 7a connecting to reference potential generator 8a generate reference charges (1/2)Q, (5/6)Q, (1/6)Q, etc., and detected charges of sense amplifier 3 corresponding to four kinds of charges outputted by charge transfer type shift register 2 corresponding to a signal of two bits, etc., outputted by multi-level signal generator 1 are supplied to multiplexer 4 to decide on states of 1st and 2nd bits. Therefore, various reference charges are generated by only one reference potential generator without providing generators as many as reference charges, so that while the constitution of the semiconductor device is miniaturized, the integration ratio will be simple.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53149436A JPS5849954B2 (en) | 1978-12-01 | 1978-12-01 | Charge transfer semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53149436A JPS5849954B2 (en) | 1978-12-01 | 1978-12-01 | Charge transfer semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5577081A true JPS5577081A (en) | 1980-06-10 |
JPS5849954B2 JPS5849954B2 (en) | 1983-11-08 |
Family
ID=15475065
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP53149436A Expired JPS5849954B2 (en) | 1978-12-01 | 1978-12-01 | Charge transfer semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5849954B2 (en) |
-
1978
- 1978-12-01 JP JP53149436A patent/JPS5849954B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5849954B2 (en) | 1983-11-08 |
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