JPS5576457A - Evaluation data collecting device for computer system performance - Google Patents

Evaluation data collecting device for computer system performance

Info

Publication number
JPS5576457A
JPS5576457A JP15030878A JP15030878A JPS5576457A JP S5576457 A JPS5576457 A JP S5576457A JP 15030878 A JP15030878 A JP 15030878A JP 15030878 A JP15030878 A JP 15030878A JP S5576457 A JPS5576457 A JP S5576457A
Authority
JP
Japan
Prior art keywords
computer
signal
measurement
interruption signal
computer system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15030878A
Other languages
Japanese (ja)
Inventor
Katsumi Muraki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP15030878A priority Critical patent/JPS5576457A/en
Publication of JPS5576457A publication Critical patent/JPS5576457A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To ensure the deviation-free measurement by sending the interruption signal of the process request signal into the computer when the count value becomes zero and at the same time obtaining the next number from the random number generator.
CONSTITUTION: The numbers featuring the exponent distribution are produced one by one through random number generator 8 to be sent to counter 9 of computer 2. Counter 9 performs count-down for its contents with a fixed cycle and then sents interruption signal 10 of process request signal 3 to computer 2 when the count value becomes 0, thus obtaining the next number from generator 8. For the interruption signal of signal 3, the arrival time interval features the exponent distribution. Thus the measurement within computer 2 is carried out in synchronization with the interruption signal, thus ensuring the measurement free from deviation.
COPYRIGHT: (C)1980,JPO&Japio
JP15030878A 1978-12-04 1978-12-04 Evaluation data collecting device for computer system performance Pending JPS5576457A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15030878A JPS5576457A (en) 1978-12-04 1978-12-04 Evaluation data collecting device for computer system performance

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15030878A JPS5576457A (en) 1978-12-04 1978-12-04 Evaluation data collecting device for computer system performance

Publications (1)

Publication Number Publication Date
JPS5576457A true JPS5576457A (en) 1980-06-09

Family

ID=15494160

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15030878A Pending JPS5576457A (en) 1978-12-04 1978-12-04 Evaluation data collecting device for computer system performance

Country Status (1)

Country Link
JP (1) JPS5576457A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03235138A (en) * 1990-02-13 1991-10-21 Agency Of Ind Science & Technol Memory access frequency measuring device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03235138A (en) * 1990-02-13 1991-10-21 Agency Of Ind Science & Technol Memory access frequency measuring device

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