JPS5573189A - Control system for pattern relay of channel-system device - Google Patents
Control system for pattern relay of channel-system deviceInfo
- Publication number
- JPS5573189A JPS5573189A JP14624678A JP14624678A JPS5573189A JP S5573189 A JPS5573189 A JP S5573189A JP 14624678 A JP14624678 A JP 14624678A JP 14624678 A JP14624678 A JP 14624678A JP S5573189 A JPS5573189 A JP S5573189A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- relay
- indication
- relays
- information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q3/00—Selecting arrangements
- H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
- H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Exchange Systems With Centralized Control (AREA)
Abstract
PURPOSE:To realize a control system for the pattern relay featuring a high efficiency, which incorporates the register, the control path setting device and others and is capable of giving the simultaneous control to the action or the release of plural units of pattern relays with one indication. CONSTITUTION:Terminals TS and TT of control path setting part PSU formed as the relay control unit are connected to terminals TS and TT of the trunk each. And now when the operation indication is received at part PSU for the pattern relay from the CPU not shown in the diagram through signal reception distributor SRD, the indication is stored temporarily in register REG. In this case, the indication indicates one area within the pattern relay via the 10 units of the bit information to be stored at bit positions 0-9 of resiter REG comprising 13 bits. And the information at bit positions 10 and 11 indicate the operation or release for the indicated relay. Then this and other relays are controlled together by the information at bit position 12. In such way, plural number of pattern relays can be controlled simultaneously.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14624678A JPS5573189A (en) | 1978-11-27 | 1978-11-27 | Control system for pattern relay of channel-system device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14624678A JPS5573189A (en) | 1978-11-27 | 1978-11-27 | Control system for pattern relay of channel-system device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5573189A true JPS5573189A (en) | 1980-06-02 |
Family
ID=15403387
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14624678A Pending JPS5573189A (en) | 1978-11-27 | 1978-11-27 | Control system for pattern relay of channel-system device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5573189A (en) |
-
1978
- 1978-11-27 JP JP14624678A patent/JPS5573189A/en active Pending
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