JPS5568760A - Asynchronous serial signal demodulator - Google Patents

Asynchronous serial signal demodulator

Info

Publication number
JPS5568760A
JPS5568760A JP14192478A JP14192478A JPS5568760A JP S5568760 A JPS5568760 A JP S5568760A JP 14192478 A JP14192478 A JP 14192478A JP 14192478 A JP14192478 A JP 14192478A JP S5568760 A JPS5568760 A JP S5568760A
Authority
JP
Japan
Prior art keywords
signal
converter
asynchronous serial
converted
integration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14192478A
Other languages
Japanese (ja)
Inventor
Shintaro Komuro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP14192478A priority Critical patent/JPS5568760A/en
Publication of JPS5568760A publication Critical patent/JPS5568760A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Manipulation Of Pulses (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To restore the input signal to the original signal with a simple operation by performing the fixed integration for the asynchronous serial signal sent from the telegraph circuit through the integrator and then giving the A/D conversion to the integration output signal to then control the converted output signal through the microcomputer. CONSTITUTION:The asynchronous serial signal sent from input terminal 400 is converted to the proper process level via voltage converter 401, and the signal is applied to integrator 402 to give the integration to each bit of the signal for the prescribed period of the signal bit rate. This integrated signal is applied to A/D converter 403 to be converted into the parallel digital signal of the bit number decided previously, and the output of converter 403 is supplied to microcomputer 404. Then converter 403 is controlled according to the conversion cycle of clock signal 410 which is transmitted through the operation of switch 411 connected to I/O port 405 of computer 404. Thus the restoration is secured to the paralles signal of the bit number decided previously through computer 404.
JP14192478A 1978-11-17 1978-11-17 Asynchronous serial signal demodulator Pending JPS5568760A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14192478A JPS5568760A (en) 1978-11-17 1978-11-17 Asynchronous serial signal demodulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14192478A JPS5568760A (en) 1978-11-17 1978-11-17 Asynchronous serial signal demodulator

Publications (1)

Publication Number Publication Date
JPS5568760A true JPS5568760A (en) 1980-05-23

Family

ID=15303314

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14192478A Pending JPS5568760A (en) 1978-11-17 1978-11-17 Asynchronous serial signal demodulator

Country Status (1)

Country Link
JP (1) JPS5568760A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49113508A (en) * 1973-02-26 1974-10-30
JPS5387134A (en) * 1977-01-12 1978-08-01 Hitachi Ltd Information processing unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49113508A (en) * 1973-02-26 1974-10-30
JPS5387134A (en) * 1977-01-12 1978-08-01 Hitachi Ltd Information processing unit

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