JPS5567840A - Display unit - Google Patents

Display unit

Info

Publication number
JPS5567840A
JPS5567840A JP14079078A JP14079078A JPS5567840A JP S5567840 A JPS5567840 A JP S5567840A JP 14079078 A JP14079078 A JP 14079078A JP 14079078 A JP14079078 A JP 14079078A JP S5567840 A JPS5567840 A JP S5567840A
Authority
JP
Japan
Prior art keywords
processor
flicker
character code
given
display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14079078A
Other languages
Japanese (ja)
Inventor
Takao Isogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panafacom Ltd
Original Assignee
Panafacom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panafacom Ltd filed Critical Panafacom Ltd
Priority to JP14079078A priority Critical patent/JPS5567840A/en
Publication of JPS5567840A publication Critical patent/JPS5567840A/en
Pending legal-status Critical Current

Links

Landscapes

  • Digital Computer Display Output (AREA)

Abstract

PURPOSE: To prevent the flicker of the screen occurring when the memory storing the display information is rewritten for the raster scan display of the CRT display unit or the like by securing the coincidence for the picture signal with the luminace equal to the background at the access time from the processor.
CONSTITUTION: The information of the character code equivalent to one picture frame which is given from processor 1 is stored in refresh memory 2. And the character code read out from memory 2 is converted into the luminance signal pattern through character generator 3 and then stored in shift register 4 to be sent to the CRT display part for display in synchronization with the horizontal scanning. In case an access is given from processor 1, the flicker occurs if the character code to be transferred to generator 3 is given directly. In this connection, the output of gate circuit 10 is matched forcedly to the luminance of the background via the output of process controller 9 at the access time to prevent the flicker.
COPYRIGHT: (C)1980,JPO&Japio
JP14079078A 1978-11-15 1978-11-15 Display unit Pending JPS5567840A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14079078A JPS5567840A (en) 1978-11-15 1978-11-15 Display unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14079078A JPS5567840A (en) 1978-11-15 1978-11-15 Display unit

Publications (1)

Publication Number Publication Date
JPS5567840A true JPS5567840A (en) 1980-05-22

Family

ID=15276794

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14079078A Pending JPS5567840A (en) 1978-11-15 1978-11-15 Display unit

Country Status (1)

Country Link
JP (1) JPS5567840A (en)

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