JPS5567803A - Programmable control circuit - Google Patents

Programmable control circuit

Info

Publication number
JPS5567803A
JPS5567803A JP14033578A JP14033578A JPS5567803A JP S5567803 A JPS5567803 A JP S5567803A JP 14033578 A JP14033578 A JP 14033578A JP 14033578 A JP14033578 A JP 14033578A JP S5567803 A JPS5567803 A JP S5567803A
Authority
JP
Japan
Prior art keywords
rom1
delivers
register
rom2
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14033578A
Other languages
Japanese (ja)
Inventor
Hiroshi Takashima
Hideo Matsuda
Yoshio Horiuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP14033578A priority Critical patent/JPS5567803A/en
Publication of JPS5567803A publication Critical patent/JPS5567803A/en
Pending legal-status Critical Current

Links

Landscapes

  • Programmable Controllers (AREA)

Abstract

PURPOSE: To realize various types of complicated control actions through the simple circuit just by altering the contents of ROM.
CONSTITUTION: First full "0" is set to register 3 as the initial stage. Now if the signal is supplied to terminal 7 at the first clock, ROM2 gives its contents 0001 to ROM1 and register 3. As a result, ROM1 delivers the control signal only to terminal 05. At the second clock, the address of ROM1 is decided by output 0001 of register 1 plus the signals applied to terminals 5 and 6. In this case, ROM2 delivers 0010 to ROM1 and register 3 with supply of "0" and "1" to terminals 5 and 6. Then ROM1 delivers the control signal to terminal 01. In such way, the address signal of ROM1 is produced by ROM2, and thus ROM1 delivers the control signal corresponding to the address signal.
COPYRIGHT: (C)1980,JPO&Japio
JP14033578A 1978-11-14 1978-11-14 Programmable control circuit Pending JPS5567803A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14033578A JPS5567803A (en) 1978-11-14 1978-11-14 Programmable control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14033578A JPS5567803A (en) 1978-11-14 1978-11-14 Programmable control circuit

Publications (1)

Publication Number Publication Date
JPS5567803A true JPS5567803A (en) 1980-05-22

Family

ID=15266425

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14033578A Pending JPS5567803A (en) 1978-11-14 1978-11-14 Programmable control circuit

Country Status (1)

Country Link
JP (1) JPS5567803A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61138305A (en) * 1984-12-10 1986-06-25 Nec Corp Sequence control circuit
JPH01166203A (en) * 1987-12-23 1989-06-30 Fanuc Ltd Programmable controller
US5969580A (en) * 1996-10-01 1999-10-19 Alcatel Transition between a ridge waveguide and a planar circuit which faces in the same direction

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61138305A (en) * 1984-12-10 1986-06-25 Nec Corp Sequence control circuit
JPH01166203A (en) * 1987-12-23 1989-06-30 Fanuc Ltd Programmable controller
US5969580A (en) * 1996-10-01 1999-10-19 Alcatel Transition between a ridge waveguide and a planar circuit which faces in the same direction

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