JPS5564689A - Abnormality detecting method for memory unit - Google Patents

Abnormality detecting method for memory unit

Info

Publication number
JPS5564689A
JPS5564689A JP13647078A JP13647078A JPS5564689A JP S5564689 A JPS5564689 A JP S5564689A JP 13647078 A JP13647078 A JP 13647078A JP 13647078 A JP13647078 A JP 13647078A JP S5564689 A JPS5564689 A JP S5564689A
Authority
JP
Japan
Prior art keywords
memory
contents
main power
power supply
volatile memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13647078A
Other languages
Japanese (ja)
Inventor
Akihiro Tamamushi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13647078A priority Critical patent/JPS5564689A/en
Publication of JPS5564689A publication Critical patent/JPS5564689A/en
Pending legal-status Critical Current

Links

Landscapes

  • Power Sources (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE: To make it possible to confirm whether or not memory contents retained in a memory unit are correct without increasing memory capacity, by specifying operations at the time when a main power is turned ON and OFF.
CONSTITUTION: With main power supply 1 OFF, memory address contents in a fixed area of volatile memory 4 are added together and stored at a specific address except memory addresses in volatile memory 4, and when the feeding of power of main power supply 1 starts, memory address contents in a fixed area of volatile memory 4 are added together and compared with contents stored in the specific address, so that a coincidence or dissidence signal between the both will be outputted by controller 5. Consequently, turning main power supply 1 ON addes contents in the fixed memory address area of volatile memory 4 and the sum is stored at the specific address as data for checking, and when main power supply 1 is turned ON again, power change-over circuit 3 applies the output of main power supply 1 to volatile memory 4 as a substitute for that of reversible battery 2 to add contents at memory addresses in the fixed area and the sum is compared with checking data stored at the specific address; when the both agree each other, a coincidence signal is outputted and when not a read of memory contents is interrupted.
COPYRIGHT: (C)1980,JPO&Japio
JP13647078A 1978-11-06 1978-11-06 Abnormality detecting method for memory unit Pending JPS5564689A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13647078A JPS5564689A (en) 1978-11-06 1978-11-06 Abnormality detecting method for memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13647078A JPS5564689A (en) 1978-11-06 1978-11-06 Abnormality detecting method for memory unit

Publications (1)

Publication Number Publication Date
JPS5564689A true JPS5564689A (en) 1980-05-15

Family

ID=15175861

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13647078A Pending JPS5564689A (en) 1978-11-06 1978-11-06 Abnormality detecting method for memory unit

Country Status (1)

Country Link
JP (1) JPS5564689A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS593796A (en) * 1982-06-29 1984-01-10 Shinko Electric Co Ltd Checking method of data in memory
JPS59140699A (en) * 1983-01-31 1984-08-13 Fujitsu Ltd Checking system of memory contents
JPS59178699A (en) * 1983-03-29 1984-10-09 Shimadzu Corp Data processing device
JPS605363A (en) * 1983-06-22 1985-01-11 Sharp Corp Confirmation system for memory contents
JP2012166073A (en) * 2012-06-11 2012-09-06 Sophia Co Ltd Game machine

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS593796A (en) * 1982-06-29 1984-01-10 Shinko Electric Co Ltd Checking method of data in memory
JPS59140699A (en) * 1983-01-31 1984-08-13 Fujitsu Ltd Checking system of memory contents
JPS59178699A (en) * 1983-03-29 1984-10-09 Shimadzu Corp Data processing device
JPS605363A (en) * 1983-06-22 1985-01-11 Sharp Corp Confirmation system for memory contents
JP2012166073A (en) * 2012-06-11 2012-09-06 Sophia Co Ltd Game machine

Similar Documents

Publication Publication Date Title
DK0526139T3 (en) Handling a computer during loss and return of supply
JPS6432489A (en) Memory device
JPS57111893A (en) Relieving system of defective memory
JPS5564689A (en) Abnormality detecting method for memory unit
JPS56156988A (en) Refresh system for nonvolatile memory
JPS5785255A (en) Memory storage for integrated circuit
JPS5528644A (en) Memory unit
EP0278392A3 (en) Non-volatile memory system
JPS6465633A (en) Microprogram controller
JPS5443648A (en) Logout controller
JPS57130291A (en) Semiconductor nonvolatile read-only storage device
JPS57211625A (en) Backup method for memory
JPS57182865A (en) Microprocessor
JPS5769460A (en) Data saving control system
JPS5616226A (en) System start system
JPS5699550A (en) Information processing unit
JPS57208689A (en) Memory control device
JPS55122299A (en) Memory unit
JPS55105884A (en) Address conversion device
JPS5587214A (en) Ipl indication system
JPS59112188U (en) program timer
JPS56101155A (en) Central control device of copying machine
JPS6418851A (en) Control system for microcomputer device
JPS52147028A (en) Error detection unit for memory
JPS5724097A (en) Storage device