JPS555299B2 - - Google Patents

Info

Publication number
JPS555299B2
JPS555299B2 JP5047977A JP5047977A JPS555299B2 JP S555299 B2 JPS555299 B2 JP S555299B2 JP 5047977 A JP5047977 A JP 5047977A JP 5047977 A JP5047977 A JP 5047977A JP S555299 B2 JPS555299 B2 JP S555299B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP5047977A
Other languages
Japanese (ja)
Other versions
JPS52125226A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5047977A priority Critical patent/JPS52125226A/ja
Publication of JPS52125226A publication Critical patent/JPS52125226A/ja
Publication of JPS555299B2 publication Critical patent/JPS555299B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Superheterodyne Receivers (AREA)
JP5047977A 1977-04-30 1977-04-30 Digital synthesizer receiver Granted JPS52125226A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5047977A JPS52125226A (en) 1977-04-30 1977-04-30 Digital synthesizer receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5047977A JPS52125226A (en) 1977-04-30 1977-04-30 Digital synthesizer receiver

Publications (2)

Publication Number Publication Date
JPS52125226A JPS52125226A (en) 1977-10-20
JPS555299B2 true JPS555299B2 (xx) 1980-02-05

Family

ID=12860031

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5047977A Granted JPS52125226A (en) 1977-04-30 1977-04-30 Digital synthesizer receiver

Country Status (1)

Country Link
JP (1) JPS52125226A (xx)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS535174B2 (xx) * 1973-09-29 1978-02-24
JPS55118233A (en) * 1979-03-05 1980-09-11 Nec Corp Counting circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4860511A (xx) * 1971-11-29 1973-08-24

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4860511A (xx) * 1971-11-29 1973-08-24

Also Published As

Publication number Publication date
JPS52125226A (en) 1977-10-20

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