JPS5547759U - - Google Patents
Info
- Publication number
- JPS5547759U JPS5547759U JP13071778U JP13071778U JPS5547759U JP S5547759 U JPS5547759 U JP S5547759U JP 13071778 U JP13071778 U JP 13071778U JP 13071778 U JP13071778 U JP 13071778U JP S5547759 U JPS5547759 U JP S5547759U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13071778U JPS5547759U (enrdf_load_stackoverflow) | 1978-09-21 | 1978-09-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13071778U JPS5547759U (enrdf_load_stackoverflow) | 1978-09-21 | 1978-09-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5547759U true JPS5547759U (enrdf_load_stackoverflow) | 1980-03-28 |
Family
ID=29096609
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13071778U Pending JPS5547759U (enrdf_load_stackoverflow) | 1978-09-21 | 1978-09-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5547759U (enrdf_load_stackoverflow) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5873621A (ja) * | 1981-10-26 | 1983-05-02 | Toa Harbor Works Co Ltd | 水底地盤への杭打設方法 |
-
1978
- 1978-09-21 JP JP13071778U patent/JPS5547759U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5873621A (ja) * | 1981-10-26 | 1983-05-02 | Toa Harbor Works Co Ltd | 水底地盤への杭打設方法 |