JPS5540950B2 - - Google Patents

Info

Publication number
JPS5540950B2
JPS5540950B2 JP13806774A JP13806774A JPS5540950B2 JP S5540950 B2 JPS5540950 B2 JP S5540950B2 JP 13806774 A JP13806774 A JP 13806774A JP 13806774 A JP13806774 A JP 13806774A JP S5540950 B2 JPS5540950 B2 JP S5540950B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP13806774A
Other languages
Japanese (ja)
Other versions
JPS5162944A (cg-RX-API-DMAC10.html
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13806774A priority Critical patent/JPS5540950B2/ja
Priority to DE19752551740 priority patent/DE2551740A1/de
Priority to US05/634,844 priority patent/US4037209A/en
Priority to ES443078A priority patent/ES443078A1/es
Priority to FR7536490A priority patent/FR2293007A1/fr
Priority to GB49305/75A priority patent/GB1505580A/en
Publication of JPS5162944A publication Critical patent/JPS5162944A/ja
Publication of JPS5540950B2 publication Critical patent/JPS5540950B2/ja
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP13806774A 1974-11-30 1974-11-30 Expired JPS5540950B2 (cg-RX-API-DMAC10.html)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP13806774A JPS5540950B2 (cg-RX-API-DMAC10.html) 1974-11-30 1974-11-30
DE19752551740 DE2551740A1 (de) 1974-11-30 1975-11-18 Datenverarbeitungseinheit
US05/634,844 US4037209A (en) 1974-11-30 1975-11-24 Data processing system for converting from logical addresses to physical addresses
ES443078A ES443078A1 (es) 1974-11-30 1975-11-28 Unidad de tratamiento de informacion.
FR7536490A FR2293007A1 (fr) 1974-11-30 1975-11-28 Unite de traitement de donnees
GB49305/75A GB1505580A (en) 1974-11-30 1975-12-01 Data processing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13806774A JPS5540950B2 (cg-RX-API-DMAC10.html) 1974-11-30 1974-11-30

Publications (2)

Publication Number Publication Date
JPS5162944A JPS5162944A (cg-RX-API-DMAC10.html) 1976-05-31
JPS5540950B2 true JPS5540950B2 (cg-RX-API-DMAC10.html) 1980-10-21

Family

ID=15213189

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13806774A Expired JPS5540950B2 (cg-RX-API-DMAC10.html) 1974-11-30 1974-11-30

Country Status (6)

Country Link
US (1) US4037209A (cg-RX-API-DMAC10.html)
JP (1) JPS5540950B2 (cg-RX-API-DMAC10.html)
DE (1) DE2551740A1 (cg-RX-API-DMAC10.html)
ES (1) ES443078A1 (cg-RX-API-DMAC10.html)
FR (1) FR2293007A1 (cg-RX-API-DMAC10.html)
GB (1) GB1505580A (cg-RX-API-DMAC10.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5792383A (en) * 1981-09-17 1982-06-08 Matsushita Electric Industrial Co Ltd Fluorescent indication tube

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5454536A (en) * 1977-10-08 1979-04-28 Fujitsu Ltd Data processor
US4277826A (en) * 1978-10-23 1981-07-07 Collins Robert W Synchronizing mechanism for page replacement control
US4511964A (en) * 1982-11-12 1985-04-16 Hewlett-Packard Company Dynamic physical memory mapping and management of independent programming environments
JPS60107156A (ja) * 1983-11-16 1985-06-12 Hitachi Ltd デ−タ処理システム
US5255384A (en) * 1985-02-22 1993-10-19 Intergraph Corporation Memory address translation system having modifiable and non-modifiable translation mechanisms
US4860192A (en) * 1985-02-22 1989-08-22 Intergraph Corporation Quadword boundary cache system
US4933835A (en) * 1985-02-22 1990-06-12 Intergraph Corporation Apparatus for maintaining consistency of a cache memory with a primary memory
US4884197A (en) * 1985-02-22 1989-11-28 Intergraph Corporation Method and apparatus for addressing a cache memory
US4899275A (en) * 1985-02-22 1990-02-06 Intergraph Corporation Cache-MMU system
US4868738A (en) * 1985-08-15 1989-09-19 Lanier Business Products, Inc. Operating system independent virtual memory computer system
US5091846A (en) * 1986-10-03 1992-02-25 Intergraph Corporation Cache providing caching/non-caching write-through and copyback modes for virtual addresses and including bus snooping to maintain coherency
DE69034227T2 (de) * 1989-04-13 2007-05-03 Sandisk Corp., Sunnyvale EEprom-System mit Blocklöschung
US7447069B1 (en) 1989-04-13 2008-11-04 Sandisk Corporation Flash EEprom system
US7190617B1 (en) * 1989-04-13 2007-03-13 Sandisk Corporation Flash EEprom system
EP0522178B1 (en) * 1991-01-23 2000-06-14 Seiko Epson Corporation Data store and image processing system comprising said data store
JP2826028B2 (ja) * 1993-01-28 1998-11-18 富士通株式会社 分散メモリ型プロセッサシステム
DE10163342A1 (de) * 2001-12-21 2003-07-10 Elektro Beckhoff Gmbh Unterneh Datenübertragungsverfahren, serielles Bussystem und Anschalteinheit für einen passiven Busteilnehmer
US7085897B2 (en) * 2003-05-12 2006-08-01 International Business Machines Corporation Memory management for a symmetric multiprocessor computer system

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3412382A (en) * 1965-11-26 1968-11-19 Massachusetts Inst Technology Shared-access data processing system
US3693165A (en) * 1971-06-29 1972-09-19 Ibm Parallel addressing of a storage hierarchy in a data processing system using virtual addressing
US3902164A (en) * 1972-07-21 1975-08-26 Ibm Method and means for reducing the amount of address translation in a virtual memory data processing system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5792383A (en) * 1981-09-17 1982-06-08 Matsushita Electric Industrial Co Ltd Fluorescent indication tube

Also Published As

Publication number Publication date
FR2293007A1 (fr) 1976-06-25
FR2293007B1 (cg-RX-API-DMAC10.html) 1979-04-27
GB1505580A (en) 1978-03-30
DE2551740A1 (de) 1976-08-12
ES443078A1 (es) 1977-04-16
JPS5162944A (cg-RX-API-DMAC10.html) 1976-05-31
US4037209A (en) 1977-07-19

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