JPS5539430A - Load driving circuit - Google Patents

Load driving circuit

Info

Publication number
JPS5539430A
JPS5539430A JP11249878A JP11249878A JPS5539430A JP S5539430 A JPS5539430 A JP S5539430A JP 11249878 A JP11249878 A JP 11249878A JP 11249878 A JP11249878 A JP 11249878A JP S5539430 A JPS5539430 A JP S5539430A
Authority
JP
Japan
Prior art keywords
output
transistor
driving circuit
signal
conducts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11249878A
Other languages
Japanese (ja)
Inventor
Yukinori Maeda
Junzo Nakajima
Masakatsu Horie
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11249878A priority Critical patent/JPS5539430A/en
Publication of JPS5539430A publication Critical patent/JPS5539430A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To secure the sudden rise of the output signal for the load driving circuit which drives the load via the photo coupler by installing the short-circuit cirucuit consisting of the photo coupler between the emitter and the base of the driving transistor and the power source.
CONSTITUTION: With application of input signals G1 and G2, LED2 has the light emission via transistors 1 and 9. As a result, driving transistor 4 conducts to generate the output to output line 7. At the fall time of the input signal, signal G3 is applied. Thus LED11 has the light emission via transistor 10, and then discharging transistor 12 conducts. As a result, the emitter and the base of teansistor 4 is short- circuited to power source V3 to secure the sudden fall for the output.
COPYRIGHT: (C)1980,JPO&Japio
JP11249878A 1978-09-13 1978-09-13 Load driving circuit Pending JPS5539430A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11249878A JPS5539430A (en) 1978-09-13 1978-09-13 Load driving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11249878A JPS5539430A (en) 1978-09-13 1978-09-13 Load driving circuit

Publications (1)

Publication Number Publication Date
JPS5539430A true JPS5539430A (en) 1980-03-19

Family

ID=14588146

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11249878A Pending JPS5539430A (en) 1978-09-13 1978-09-13 Load driving circuit

Country Status (1)

Country Link
JP (1) JPS5539430A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6066130U (en) * 1983-10-12 1985-05-10 オムロン株式会社 Non-contact input circuit
JPH01143660U (en) * 1988-03-23 1989-10-02

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6066130U (en) * 1983-10-12 1985-05-10 オムロン株式会社 Non-contact input circuit
JPH01143660U (en) * 1988-03-23 1989-10-02

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