JPS5536766A - Frequency analysis method - Google Patents

Frequency analysis method

Info

Publication number
JPS5536766A
JPS5536766A JP10997378A JP10997378A JPS5536766A JP S5536766 A JPS5536766 A JP S5536766A JP 10997378 A JP10997378 A JP 10997378A JP 10997378 A JP10997378 A JP 10997378A JP S5536766 A JPS5536766 A JP S5536766A
Authority
JP
Japan
Prior art keywords
digital
analog
filter
memory
analog converter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10997378A
Other languages
Japanese (ja)
Inventor
Toshiaki Koshirai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rion Co Ltd
Original Assignee
Rion Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rion Co Ltd filed Critical Rion Co Ltd
Priority to JP10997378A priority Critical patent/JPS5536766A/en
Publication of JPS5536766A publication Critical patent/JPS5536766A/en
Pending legal-status Critical Current

Links

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  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE: To reduce the number of elements, the response speed of a circuit and power consumed, by changing analog input signals passing through an anti-areasing filter into digital shapes, by writing the singals in a memory and by using a filter.
CONSTITUTION: Analog input signals passing through an anti-areasing filter 2 are turned into digital forms by means of a digital-analog converter 3 at speed that satisfies the theorem of sampling, and written in a memory 4. The signals are simultaneously let pass through a digital-analog converter 5, and input to a 1/N octave filter 7 through an analog multiplier 6. A memory control 8 controls the analog multiplier 6 through the memory 4, a window 9 and a digital-analog converter 10.
COPYRIGHT: (C)1980,JPO&Japio
JP10997378A 1978-09-07 1978-09-07 Frequency analysis method Pending JPS5536766A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10997378A JPS5536766A (en) 1978-09-07 1978-09-07 Frequency analysis method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10997378A JPS5536766A (en) 1978-09-07 1978-09-07 Frequency analysis method

Publications (1)

Publication Number Publication Date
JPS5536766A true JPS5536766A (en) 1980-03-14

Family

ID=14523838

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10997378A Pending JPS5536766A (en) 1978-09-07 1978-09-07 Frequency analysis method

Country Status (1)

Country Link
JP (1) JPS5536766A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60112595A (en) * 1983-11-18 1985-06-19 住友金属工業株式会社 Leg member of jack-up-rig and manufacture thereof
JP2011259323A (en) * 2010-06-10 2011-12-22 Panasonic Electric Works Co Ltd Method of controlling output using plurality of pwm signals

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52102073A (en) * 1976-02-20 1977-08-26 Nec Corp Multi-input channel spectrum analysis apparatus
JPS5371876A (en) * 1976-12-08 1978-06-26 Matsushita Electric Ind Co Ltd Frequency spectrum analyzer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52102073A (en) * 1976-02-20 1977-08-26 Nec Corp Multi-input channel spectrum analysis apparatus
JPS5371876A (en) * 1976-12-08 1978-06-26 Matsushita Electric Ind Co Ltd Frequency spectrum analyzer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60112595A (en) * 1983-11-18 1985-06-19 住友金属工業株式会社 Leg member of jack-up-rig and manufacture thereof
JP2011259323A (en) * 2010-06-10 2011-12-22 Panasonic Electric Works Co Ltd Method of controlling output using plurality of pwm signals

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