JPS5528687A - Detection circuit for vertical synchronizing signal - Google Patents

Detection circuit for vertical synchronizing signal

Info

Publication number
JPS5528687A
JPS5528687A JP10321678A JP10321678A JPS5528687A JP S5528687 A JPS5528687 A JP S5528687A JP 10321678 A JP10321678 A JP 10321678A JP 10321678 A JP10321678 A JP 10321678A JP S5528687 A JPS5528687 A JP S5528687A
Authority
JP
Japan
Prior art keywords
synchronous
signal
fed
circuit
synchronizing signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10321678A
Other languages
Japanese (ja)
Other versions
JPS6330830B2 (en
Inventor
Nobuo Minoura
Isao Matsumura
Yasukazu Yoshinaga
Takao Abumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP10321678A priority Critical patent/JPS5528687A/en
Publication of JPS5528687A publication Critical patent/JPS5528687A/en
Publication of JPS6330830B2 publication Critical patent/JPS6330830B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Synchronizing For Television (AREA)

Abstract

PURPOSE: To ensure to detect the synchronizing signal even with the vertical synchronizing signal with sag, by the synchronous detection of the synchronizing signal obtained from the synchronous separation circuit with the flyback pulse and adding the output of the synchronous amplifier.
CONSTITUTION: When the synthesis video signal is fed to the input terminal T1, only the horizontal and vertical synchronizing signals are introduced with amplitude separation from this signal at the synchronous separation circuit 1, and this is fed to the wave shape circuit 2 so that the horizontal synchronous signal is delayed in matching with the phase of the flyback pulse and it is fed to the synchronous detection circuit 3. It is in synchronous detection with the flyback pulse fed to the input terminal T2, this output is amplified at the synchronous amplifier 4, and the vertical synchronous signal is picked up from the output terminal T3. When the synthesized video signal is fed to the terminal T3 with sag, the signal deficient in 3 H's share is obtained from the circuit 1 as the vertical synchronizing signal. But, with synchronous detection at the circuit 3, the same output waveform as without sag is obtained and accordingly, the vertical synchronous signal is obtained from the terminal T3 independently of the presence of sag.
COPYRIGHT: (C)1980,JPO&Japio
JP10321678A 1978-08-23 1978-08-23 Detection circuit for vertical synchronizing signal Granted JPS5528687A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10321678A JPS5528687A (en) 1978-08-23 1978-08-23 Detection circuit for vertical synchronizing signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10321678A JPS5528687A (en) 1978-08-23 1978-08-23 Detection circuit for vertical synchronizing signal

Publications (2)

Publication Number Publication Date
JPS5528687A true JPS5528687A (en) 1980-02-29
JPS6330830B2 JPS6330830B2 (en) 1988-06-21

Family

ID=14348299

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10321678A Granted JPS5528687A (en) 1978-08-23 1978-08-23 Detection circuit for vertical synchronizing signal

Country Status (1)

Country Link
JP (1) JPS5528687A (en)

Also Published As

Publication number Publication date
JPS6330830B2 (en) 1988-06-21

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