JPS5528122A - Control system for multiplex system - Google Patents
Control system for multiplex systemInfo
- Publication number
- JPS5528122A JPS5528122A JP9941078A JP9941078A JPS5528122A JP S5528122 A JPS5528122 A JP S5528122A JP 9941078 A JP9941078 A JP 9941078A JP 9941078 A JP9941078 A JP 9941078A JP S5528122 A JPS5528122 A JP S5528122A
- Authority
- JP
- Japan
- Prior art keywords
- cpu
- route
- unit
- cpucc
- control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To enable to set the route from CPU to external unit simply, by providing the data channel crossing part to set the route of CPU with the external unit of the system itself, and another system corresponding to CPU.
CONSTITUTION: A CPU, e.g., CCo has a plurality of external units I/O connected to it via the channel bus CBo to control the route control flip flop FFo corresponding to CPU. Further, the data channel crossing section DCCo controlled with the route control FF1 corresponding to CPUCC1 in another system and having the gate to set the route of CPUCCo and the unit I/O of the system itself and another system, is provided corresponding to CPUCCo. Thus, the unit I/O of the system in which the control FF is "1" can use only CCo of CPU of the system itself, and the unit I/O in which the controll FF is "0" can use only CPUCC1 in another system, to simplify the setting of route from CPU to the unit I/O.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9941078A JPS5528122A (en) | 1978-08-14 | 1978-08-14 | Control system for multiplex system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9941078A JPS5528122A (en) | 1978-08-14 | 1978-08-14 | Control system for multiplex system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5528122A true JPS5528122A (en) | 1980-02-28 |
Family
ID=14246702
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9941078A Pending JPS5528122A (en) | 1978-08-14 | 1978-08-14 | Control system for multiplex system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5528122A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5533214A (en) * | 1978-08-31 | 1980-03-08 | Oki Electric Ind Co Ltd | Information processing system |
JPS57162890A (en) * | 1981-03-31 | 1982-10-06 | Teac Co | Information signal recorder |
JPS6486327A (en) * | 1988-08-19 | 1989-03-31 | Teac Corp | Information signal recorder |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS504298A (en) * | 1973-05-16 | 1975-01-17 | ||
JPS5058954A (en) * | 1973-09-26 | 1975-05-22 | ||
JPS50124547A (en) * | 1974-03-18 | 1975-09-30 |
-
1978
- 1978-08-14 JP JP9941078A patent/JPS5528122A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS504298A (en) * | 1973-05-16 | 1975-01-17 | ||
JPS5058954A (en) * | 1973-09-26 | 1975-05-22 | ||
JPS50124547A (en) * | 1974-03-18 | 1975-09-30 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5533214A (en) * | 1978-08-31 | 1980-03-08 | Oki Electric Ind Co Ltd | Information processing system |
JPS57162890A (en) * | 1981-03-31 | 1982-10-06 | Teac Co | Information signal recorder |
JPS6253111B2 (en) * | 1981-03-31 | 1987-11-09 | Teac Corp | |
JPS6486327A (en) * | 1988-08-19 | 1989-03-31 | Teac Corp | Information signal recorder |
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