JPS5527770A - Synchronous signal detection matching circuit - Google Patents

Abstract

PURPOSE:To realize an AM synchronous signal detection matching which is highly resistant to the noise and suited for the synchronous matching even for the radio circuit of a low S/N ratio in case the data is transmitted by radio. CONSTITUTION:Only the subcarrier signal component of the input signal passes through BPF1 and is then reduced down to a fixed level via AGC circuit 2 to be supplied to weighting circuit 3 in the form of signal (a) along with signal (b). Thus weighting addition signal (c) is delivered. Signal (c) is then delayed for a fixed time through delay circuit 4 and supplied to circuit 3 in the form of signal (b). Here the constant is decided properly for the signal supplied once to decide the residue rate. The delay time of circuit 4 is set to an integer-fold value identical to the cycle of the synchronous signal. In case the noise exists in the communication line, the noise phase is random to the phase of the subcarrier but averaged through repetition of addition. And only the signal component is emphasized. The output of circuit 3 is applied to rectifier circuit 5 and slicing circuit 6 to detect the synchronous signal. Furthermore, a high resistance is obtained even to the impulsive noise by deciding the constant properly.