JPS5518929A - Electronic watch - Google Patents
Electronic watchInfo
- Publication number
- JPS5518929A JPS5518929A JP9130878A JP9130878A JPS5518929A JP S5518929 A JPS5518929 A JP S5518929A JP 9130878 A JP9130878 A JP 9130878A JP 9130878 A JP9130878 A JP 9130878A JP S5518929 A JPS5518929 A JP S5518929A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- zero
- interrupting
- rms
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G04—HOROLOGY
- G04D—APPARATUS OR TOOLS SPECIALLY DESIGNED FOR MAKING OR MAINTAINING CLOCKS OR WATCHES
- G04D7/00—Measuring, counting, calibrating, testing or regulating apparatus
- G04D7/002—Electrical measuring and testing apparatus
- G04D7/003—Electrical measuring and testing apparatus for electric or electronic clocks
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Electric Clocks (AREA)
Abstract
PURPOSE:To facilitate the tests of an integrated circuit by interrupting the operations of means for periodically reducing a voltage, which is to be impressed upon a liquid crystal display device, to a zero time when a test mode detecting signal is generated. CONSTITUTION:When a test mode detecting signal is generated under the condition with an adjusting terminal 112 being connected to an ''H'', and when a main voltage reduction predicting signal is generated, the output of an OR 128 is raised to the ''H'' so that the RESET signal is raised to the ''H''. The pulse width of an interrupting signal at that time is reduced to zero. Since the pulse widths of the interrupting signal are set at 7/16, 5/16, 1/16 and zero, if the effective voltage to be fed to a liquid crystal from a drive signal left uniterrupted is denoted at V rms, the voltage to be impressed with the pulse width of 1/16 and zero is expressed by V rms X(15/16)<1/2>, V rms. As a result, when the logic circuit is brought into a test mode, if the setting is made such that the pulse width of the interrupting signal is reduced to zero, the drive waveforms are simplified so that the tests can be easily performed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9130878A JPS5518929A (en) | 1978-07-26 | 1978-07-26 | Electronic watch |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9130878A JPS5518929A (en) | 1978-07-26 | 1978-07-26 | Electronic watch |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5518929A true JPS5518929A (en) | 1980-02-09 |
Family
ID=14022829
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9130878A Pending JPS5518929A (en) | 1978-07-26 | 1978-07-26 | Electronic watch |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5518929A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0481912A (en) * | 1990-07-24 | 1992-03-16 | Sharp Corp | Voltage drop circuit of semiconductor device |
-
1978
- 1978-07-26 JP JP9130878A patent/JPS5518929A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0481912A (en) * | 1990-07-24 | 1992-03-16 | Sharp Corp | Voltage drop circuit of semiconductor device |
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