JPS55166330A - Integrated circuit device - Google Patents

Integrated circuit device

Info

Publication number
JPS55166330A
JPS55166330A JP7451179A JP7451179A JPS55166330A JP S55166330 A JPS55166330 A JP S55166330A JP 7451179 A JP7451179 A JP 7451179A JP 7451179 A JP7451179 A JP 7451179A JP S55166330 A JPS55166330 A JP S55166330A
Authority
JP
Japan
Prior art keywords
gate
circuit
gate circuit
integrated circuit
master
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7451179A
Other languages
Japanese (ja)
Inventor
Kenji Matsuo
Yasoji Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP7451179A priority Critical patent/JPS55166330A/en
Publication of JPS55166330A publication Critical patent/JPS55166330A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H03K3/0372—Bistable circuits of the primary-secondary type

Abstract

PURPOSE:To realize the high-speed working for the MOSFET integrated circuit, by setting gm of the gate circuit of FF at the slave part receiving the output of the master part equal to or larger than gm of the gate circuit of FF at the master part. CONSTITUTION:Master part 1 includes gate circuit G1 consisting of NAND gate 2 and OR gate 3 plus gate circuit G2 consisting of NAND gate 4 and OR gate 5 respectively. And slave part 6 includes gate circuit G5 consisting of NOR gate 7 and AND gate 8 plus gate circuit G4 consisting of NOR gate 9 and AND gate 10 each. Here gm of the gate circuit of FF at part 6 receiving the output of the gate circuit of FF at part 1 is set equal to or larger than gm of the gate circuit of FF at part 1. As a result, the high-speed working is ensured for the master-slave connecting MOSFET integrated circuit.
JP7451179A 1979-06-13 1979-06-13 Integrated circuit device Pending JPS55166330A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7451179A JPS55166330A (en) 1979-06-13 1979-06-13 Integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7451179A JPS55166330A (en) 1979-06-13 1979-06-13 Integrated circuit device

Publications (1)

Publication Number Publication Date
JPS55166330A true JPS55166330A (en) 1980-12-25

Family

ID=13549417

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7451179A Pending JPS55166330A (en) 1979-06-13 1979-06-13 Integrated circuit device

Country Status (1)

Country Link
JP (1) JPS55166330A (en)

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